
Monjur Rahim
Examiner (ID: 5817, Phone: (571)270-3890 , Office: P/2436 )
| Most Active Art Unit | 2436 |
| Art Unit(s) | 2434, 2436, 2134, 2492 |
| Total Applications | 1023 |
| Issued Applications | 834 |
| Pending Applications | 70 |
| Abandoned Applications | 139 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18570666
[patent_doc_number] => 20230261003
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-17
[patent_title] => INTEGRATED CIRCUIT DEVICE AND METHOD
[patent_app_type] => utility
[patent_app_number] => 18/306508
[patent_app_country] => US
[patent_app_date] => 2023-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9229
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18306508
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/306508 | Integrated circuit device and method | Apr 24, 2023 | Issued |
Array
(
[id] => 19531835
[patent_doc_number] => 20240355737
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-24
[patent_title] => VIA GROUND STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 18/304001
[patent_app_country] => US
[patent_app_date] => 2023-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5019
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18304001
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/304001 | VIA GROUND STRUCTURES | Apr 19, 2023 | Pending |
Array
(
[id] => 19064641
[patent_doc_number] => 11943918
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-26
[patent_title] => Memory structure and fabrication method thereof
[patent_app_type] => utility
[patent_app_number] => 18/135552
[patent_app_country] => US
[patent_app_date] => 2023-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 4642
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18135552
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/135552 | Memory structure and fabrication method thereof | Apr 16, 2023 | Issued |
Array
(
[id] => 19515787
[patent_doc_number] => 20240347473
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-17
[patent_title] => VOLTAGE-ISOLATED INTEGRATED CIRCUIT PACKAGES WITH BACK-SIDE TRANSFORMERS
[patent_app_type] => utility
[patent_app_number] => 18/300711
[patent_app_country] => US
[patent_app_date] => 2023-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6238
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -37
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18300711
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/300711 | VOLTAGE-ISOLATED INTEGRATED CIRCUIT PACKAGES WITH BACK-SIDE TRANSFORMERS | Apr 13, 2023 | Pending |
Array
(
[id] => 18488479
[patent_doc_number] => 20230215827
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-06
[patent_title] => ELECTRONIC COMPONENT
[patent_app_type] => utility
[patent_app_number] => 18/181791
[patent_app_country] => US
[patent_app_date] => 2023-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10707
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18181791
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/181791 | Electronic component | Mar 9, 2023 | Issued |
Array
(
[id] => 19460159
[patent_doc_number] => 12100666
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-24
[patent_title] => Method for forming chip package structure
[patent_app_type] => utility
[patent_app_number] => 18/178775
[patent_app_country] => US
[patent_app_date] => 2023-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 9159
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18178775
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/178775 | Method for forming chip package structure | Mar 5, 2023 | Issued |
Array
(
[id] => 18502260
[patent_doc_number] => 20230225136
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-13
[patent_title] => SEMICONDUCTOR STRUCTURE INTEGRATED WITH MAGNETIC TUNNELING JUNCTION
[patent_app_type] => utility
[patent_app_number] => 18/178523
[patent_app_country] => US
[patent_app_date] => 2023-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7479
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18178523
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/178523 | Semiconductor structure integrated with magnetic tunneling junction | Mar 4, 2023 | Issued |
Array
(
[id] => 18490309
[patent_doc_number] => 20230217663
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-06
[patent_title] => A MEMORY CELL AND MEMORY ARRAY SELECT TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 18/171497
[patent_app_country] => US
[patent_app_date] => 2023-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12317
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18171497
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/171497 | Memory cell and memory array select transistor | Feb 19, 2023 | Issued |
Array
(
[id] => 19023329
[patent_doc_number] => 20240079500
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-07
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/170416
[patent_app_country] => US
[patent_app_date] => 2023-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12672
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18170416
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/170416 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME | Feb 15, 2023 | Pending |
Array
(
[id] => 18440245
[patent_doc_number] => 20230187540
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => SOURCE/DRAIN STRUCTURE FOR SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/165117
[patent_app_country] => US
[patent_app_date] => 2023-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12327
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18165117
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/165117 | Source/drain structure for semiconductor device | Feb 5, 2023 | Issued |
Array
(
[id] => 18440106
[patent_doc_number] => 20230187401
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => PILLARS AS STOPS FOR PRECISE CHIP-TO-CHIP SEPARATION
[patent_app_type] => utility
[patent_app_number] => 18/106170
[patent_app_country] => US
[patent_app_date] => 2023-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9072
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18106170
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/106170 | Pillars as stops for precise chip-to-chip separation | Feb 5, 2023 | Issued |
Array
(
[id] => 18442213
[patent_doc_number] => 20230189509
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/164586
[patent_app_country] => US
[patent_app_date] => 2023-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3421
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18164586
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/164586 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE | Feb 3, 2023 | Pending |
Array
(
[id] => 18743484
[patent_doc_number] => 20230352472
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-02
[patent_title] => BIDIRECTIONAL ELECTROSTATIC DISCHARGE PROTECTION DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/157072
[patent_app_country] => US
[patent_app_date] => 2023-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11411
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18157072
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/157072 | Bidirectional electrostatic discharge protection device | Jan 19, 2023 | Issued |
Array
(
[id] => 18514671
[patent_doc_number] => 20230230932
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-20
[patent_title] => METHOD AND SYSTEM FOR FABRICATING FIDUCIALS FOR PROCESSING OF SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/097994
[patent_app_country] => US
[patent_app_date] => 2023-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7525
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18097994
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/097994 | Method and system for fabricating fiducials for processing of semiconductor devices | Jan 16, 2023 | Issued |
Array
(
[id] => 18898760
[patent_doc_number] => 20240014245
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-11
[patent_title] => HIGH-SPEED READOUT IMAGE SENSOR
[patent_app_type] => utility
[patent_app_number] => 18/149746
[patent_app_country] => US
[patent_app_date] => 2023-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20828
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149746
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/149746 | High-speed readout image sensor | Jan 3, 2023 | Issued |
Array
(
[id] => 18319292
[patent_doc_number] => 20230117420
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-20
[patent_title] => SELF-ALIGNED EPITAXY LAYER
[patent_app_type] => utility
[patent_app_number] => 18/068203
[patent_app_country] => US
[patent_app_date] => 2022-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10427
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 17
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18068203
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/068203 | Self-aligned epitaxy layer | Dec 18, 2022 | Issued |
Array
(
[id] => 20268588
[patent_doc_number] => 12439600
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-10-07
[patent_title] => Semiconductor devices and data storage systems including the same
[patent_app_type] => utility
[patent_app_number] => 18/063878
[patent_app_country] => US
[patent_app_date] => 2022-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 6751
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18063878
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/063878 | Semiconductor devices and data storage systems including the same | Dec 8, 2022 | Issued |
Array
(
[id] => 18759660
[patent_doc_number] => 20230363149
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => SEMICONDUCTOR MEMORY DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/077419
[patent_app_country] => US
[patent_app_date] => 2022-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16070
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18077419
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/077419 | Semiconductor memory devices | Dec 7, 2022 | Issued |
Array
(
[id] => 18745588
[patent_doc_number] => 20230354582
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-02
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/062825
[patent_app_country] => US
[patent_app_date] => 2022-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12386
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18062825
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/062825 | SEMICONDUCTOR DEVICE | Dec 6, 2022 | Pending |
Array
(
[id] => 18490306
[patent_doc_number] => 20230217660
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-06
[patent_title] => SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/062837
[patent_app_country] => US
[patent_app_date] => 2022-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18298
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 229
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18062837
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/062837 | Semiconductor devices and data storage systems including the same | Dec 6, 2022 | Issued |