Search

Mouloucoulay Inoussa

Examiner (ID: 665, Phone: (571)272-0596 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
916
Issued Applications
745
Pending Applications
111
Abandoned Applications
108

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19743017 [patent_doc_number] => 12219880 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Integrated circuit device [patent_app_type] => utility [patent_app_number] => 18/595256 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 6562 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18595256 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/595256
Integrated circuit device Mar 3, 2024 Issued
Array ( [id] => 19335700 [patent_doc_number] => 20240250130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => SEMICONDUCTOR DEVICE WITH CONDUCTIVE ELEMENTS FORMED OVER DIELECTRIC LAYERS AND METHOD OF FABRICATION THEREFOR [patent_app_type] => utility [patent_app_number] => 18/593544 [patent_app_country] => US [patent_app_date] => 2024-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18593544 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/593544
Semiconductor device with conductive elements formed over dielectric layers and method of fabrication therefor Feb 29, 2024 Issued
Array ( [id] => 19733863 [patent_doc_number] => 12211865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Edge seals for semiconductor packages [patent_app_type] => utility [patent_app_number] => 18/586731 [patent_app_country] => US [patent_app_date] => 2024-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3468 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18586731 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/586731
Edge seals for semiconductor packages Feb 25, 2024 Issued
Array ( [id] => 19828065 [patent_doc_number] => 12248849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => Quantum annealing debugging systems and methods [patent_app_type] => utility [patent_app_number] => 18/444208 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 13832 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18444208 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/444208
Quantum annealing debugging systems and methods Feb 15, 2024 Issued
Array ( [id] => 19191591 [patent_doc_number] => 20240170504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => PHOTOMASK, DISPLAY DEVICE, AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/422006 [patent_app_country] => US [patent_app_date] => 2024-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17001 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18422006 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/422006
Photomask, display device, and manufacturing method thereof Jan 24, 2024 Issued
Array ( [id] => 19639697 [patent_doc_number] => 12170314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/411667 [patent_app_country] => US [patent_app_date] => 2024-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 57 [patent_no_of_words] => 10740 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18411667 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/411667
Semiconductor device and manufacturing method thereof Jan 11, 2024 Issued
Array ( [id] => 19146975 [patent_doc_number] => 20240146019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => ELECTRONIC CHIP SUPPORT DEVICE AND CORRESPONDING MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 18/408149 [patent_app_country] => US [patent_app_date] => 2024-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18408149 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/408149
Electronic chip support device and corresponding manufacturing method Jan 8, 2024 Issued
Array ( [id] => 19116476 [patent_doc_number] => 20240128226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => Semiconductor Device Having a Layer Stack, Semiconductor Arrangement and Method for Producing the Same [patent_app_type] => utility [patent_app_number] => 18/397457 [patent_app_country] => US [patent_app_date] => 2023-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18397457 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/397457
Semiconductor device having a layer stack, semiconductor arrangement and method for producing the same Dec 26, 2023 Issued
Array ( [id] => 19552915 [patent_doc_number] => 12136628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => High voltage three-dimensional devices having dielectric liners [patent_app_type] => utility [patent_app_number] => 18/538795 [patent_app_country] => US [patent_app_date] => 2023-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 6633 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 405 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18538795 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/538795
High voltage three-dimensional devices having dielectric liners Dec 12, 2023 Issued
Array ( [id] => 19100978 [patent_doc_number] => 20240120206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => ADVANCED ETCHING TECHNOLOGIES FOR STRAIGHT, TALL AND UNIFORM FINS ACROSS MULTIPLE FIN PITCH STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/531359 [patent_app_country] => US [patent_app_date] => 2023-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8099 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531359 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/531359
Advanced etching technologies for straight, tall and uniform fins across multiple fin pitch structures Dec 5, 2023 Issued
Array ( [id] => 19054792 [patent_doc_number] => 20240096761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SEMICONDUCTOR PACKAGE WITH TOP CIRCUIT AND AN IC WITH A GAP OVER THE IC [patent_app_type] => utility [patent_app_number] => 18/527457 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527457 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/527457
Semiconductor package with top circuit and an IC with a gap over the IC Dec 3, 2023 Issued
Array ( [id] => 20163011 [patent_doc_number] => 12389668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Polysilicon resistor structures [patent_app_type] => utility [patent_app_number] => 18/516311 [patent_app_country] => US [patent_app_date] => 2023-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 1046 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18516311 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/516311
Polysilicon resistor structures Nov 20, 2023 Issued
Array ( [id] => 19035940 [patent_doc_number] => 20240085755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => TANDEM VISION WINDOW AND MEDIA DISPLAY [patent_app_type] => utility [patent_app_number] => 18/514589 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 55191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18514589 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/514589
Tandem vision window and media display Nov 19, 2023 Issued
Array ( [id] => 19461412 [patent_doc_number] => 12101946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Integrated assemblies comprising hydrogen diffused within two or more different semiconductor materials, and methods of forming integrated assemblies [patent_app_type] => utility [patent_app_number] => 18/387921 [patent_app_country] => US [patent_app_date] => 2023-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5052 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18387921 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/387921
Integrated assemblies comprising hydrogen diffused within two or more different semiconductor materials, and methods of forming integrated assemblies Nov 7, 2023 Issued
Array ( [id] => 19475311 [patent_doc_number] => 12105395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Controllers for optically-switchable devices [patent_app_type] => utility [patent_app_number] => 18/493067 [patent_app_country] => US [patent_app_date] => 2023-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 36486 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18493067 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/493067
Controllers for optically-switchable devices Oct 23, 2023 Issued
Array ( [id] => 19670864 [patent_doc_number] => 12183634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Selective recessing to form a fully aligned via [patent_app_type] => utility [patent_app_number] => 18/381969 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 9294 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18381969 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/381969
Selective recessing to form a fully aligned via Oct 18, 2023 Issued
Array ( [id] => 18959126 [patent_doc_number] => 20240047453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => METHOD OF MAKING SEMICONDUCTOR DEVICE ELECTROSTATIC DISCHARGE DIODE [patent_app_type] => utility [patent_app_number] => 18/489652 [patent_app_country] => US [patent_app_date] => 2023-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13396 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18489652 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/489652
Method of making semiconductor device electrostatic discharge diode Oct 17, 2023 Issued
Array ( [id] => 18957777 [patent_doc_number] => 20240046104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => INFORMATION PROCESSING DEVICE AND INFORMATION PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 18/487217 [patent_app_country] => US [patent_app_date] => 2023-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27326 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18487217 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/487217
Information processing device and information processing method Oct 15, 2023 Issued
Array ( [id] => 19487277 [patent_doc_number] => 12107002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Manufacturing method of semiconductor structure [patent_app_type] => utility [patent_app_number] => 18/484452 [patent_app_country] => US [patent_app_date] => 2023-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2601 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18484452 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/484452
Manufacturing method of semiconductor structure Oct 10, 2023 Issued
Array ( [id] => 18927173 [patent_doc_number] => 20240030177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => DOUBLE-SIDED COOLING TYPE POWER MODULE AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/375761 [patent_app_country] => US [patent_app_date] => 2023-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6428 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18375761 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/375761
Double-sided cooling type power module and manufacturing method therefor Oct 1, 2023 Issued
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