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Mouloucoulay Inoussa

Examiner (ID: 876, Phone: (571)272-0596 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
970
Issued Applications
780
Pending Applications
98
Abandoned Applications
113

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19749491 [patent_doc_number] => 20250038056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => Submounts with Stud Protrusions for Semiconductor Packages [patent_app_type] => utility [patent_app_number] => 18/419128 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419128 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419128
Submounts with Stud Protrusions for Semiconductor Packages Jan 21, 2024 Pending
Array ( [id] => 19575622 [patent_doc_number] => 20240379914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/417055 [patent_app_country] => US [patent_app_date] => 2024-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18417055 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/417055
DISPLAY DEVICE Jan 18, 2024 Pending
Array ( [id] => 20103130 [patent_doc_number] => 20250233066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => THREE DIMENSIONAL CHIP AND PACKAGE INTEGRATION WITH BACKSIDE METALLIZATION [patent_app_type] => utility [patent_app_number] => 18/415090 [patent_app_country] => US [patent_app_date] => 2024-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18415090 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/415090
THREE DIMENSIONAL CHIP AND PACKAGE INTEGRATION WITH BACKSIDE METALLIZATION Jan 16, 2024 Pending
Array ( [id] => 19639697 [patent_doc_number] => 12170314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/411667 [patent_app_country] => US [patent_app_date] => 2024-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 57 [patent_no_of_words] => 10740 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18411667 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/411667
Semiconductor device and manufacturing method thereof Jan 11, 2024 Issued
Array ( [id] => 20720199 [patent_doc_number] => 12635471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Method of laying protective sheet and protective sheet [patent_app_type] => utility [patent_app_number] => 18/409076 [patent_app_country] => US [patent_app_date] => 2024-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 5808 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18409076 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/409076
Method of laying protective sheet and protective sheet Jan 9, 2024 Issued
Array ( [id] => 20096362 [patent_doc_number] => 20250226298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => EMBEDDABLE TILES CONTAINING PASSIVE DEVICES FOR PACKAGED SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/408914 [patent_app_country] => US [patent_app_date] => 2024-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3324 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18408914 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/408914
EMBEDDABLE TILES CONTAINING PASSIVE DEVICES FOR PACKAGED SEMICONDUCTOR DEVICES Jan 9, 2024 Pending
Array ( [id] => 19146305 [patent_doc_number] => 20240145334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => POWER MODULE WITH METALLIC HEAT SPREADER [patent_app_type] => utility [patent_app_number] => 18/408958 [patent_app_country] => US [patent_app_date] => 2024-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5763 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18408958 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/408958
POWER MODULE WITH METALLIC HEAT SPREADER Jan 9, 2024 Pending
Array ( [id] => 19146975 [patent_doc_number] => 20240146019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => ELECTRONIC CHIP SUPPORT DEVICE AND CORRESPONDING MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 18/408149 [patent_app_country] => US [patent_app_date] => 2024-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18408149 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/408149
Electronic chip support device and corresponding manufacturing method Jan 8, 2024 Issued
Array ( [id] => 19116476 [patent_doc_number] => 20240128226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => Semiconductor Device Having a Layer Stack, Semiconductor Arrangement and Method for Producing the Same [patent_app_type] => utility [patent_app_number] => 18/397457 [patent_app_country] => US [patent_app_date] => 2023-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18397457 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/397457
Semiconductor device having a layer stack, semiconductor arrangement and method for producing the same Dec 26, 2023 Issued
Array ( [id] => 20063416 [patent_doc_number] => 20250201638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => STRUCTURE FOR MONITORING HYBRID BONDS IN A SEMICONDUCTOR CHIP PACKAGE [patent_app_type] => utility [patent_app_number] => 18/540635 [patent_app_country] => US [patent_app_date] => 2023-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5796 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18540635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/540635
Structure for monitoring hybrid bonds in a semiconductor chip package Dec 13, 2023 Issued
Array ( [id] => 19552915 [patent_doc_number] => 12136628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => High voltage three-dimensional devices having dielectric liners [patent_app_type] => utility [patent_app_number] => 18/538795 [patent_app_country] => US [patent_app_date] => 2023-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 6633 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 405 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18538795 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/538795
High voltage three-dimensional devices having dielectric liners Dec 12, 2023 Issued
Array ( [id] => 19407322 [patent_doc_number] => 20240290833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => SEMICONDUCTOR DEVICE HAVING DEVICE ISOLATION LAYERS [patent_app_type] => utility [patent_app_number] => 18/537552 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8858 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18537552 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/537552
SEMICONDUCTOR DEVICE HAVING DEVICE ISOLATION LAYERS Dec 11, 2023 Pending
Array ( [id] => 19349446 [patent_doc_number] => 20240258410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/531836 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531836 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/531836
SEMICONDUCTOR DEVICES Dec 6, 2023 Pending
Array ( [id] => 19100978 [patent_doc_number] => 20240120206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => ADVANCED ETCHING TECHNOLOGIES FOR STRAIGHT, TALL AND UNIFORM FINS ACROSS MULTIPLE FIN PITCH STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/531359 [patent_app_country] => US [patent_app_date] => 2023-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8099 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531359 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/531359
Advanced etching technologies for straight, tall and uniform fins across multiple fin pitch structures Dec 5, 2023 Issued
Array ( [id] => 19054792 [patent_doc_number] => 20240096761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SEMICONDUCTOR PACKAGE WITH TOP CIRCUIT AND AN IC WITH A GAP OVER THE IC [patent_app_type] => utility [patent_app_number] => 18/527457 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527457 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/527457
Semiconductor package with top circuit and an IC with a gap over the IC Dec 3, 2023 Issued
Array ( [id] => 20979445 [patent_doc_number] => 12740170 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-09-15 [patent_title] => Image sensor including multi-spectral filter and electronic device including the image sensor [patent_app_type] => utility [patent_app_number] => 18/519820 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 3199 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519820 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/519820
IMAGE SENSOR INCLUDING MULTI-SPECTRAL FILTER AND ELECTRONIC DEVICE INCLUDING THE IMAGE SENSOR Nov 26, 2023 Pending
Array ( [id] => 20163011 [patent_doc_number] => 12389668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Polysilicon resistor structures [patent_app_type] => utility [patent_app_number] => 18/516311 [patent_app_country] => US [patent_app_date] => 2023-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 1046 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18516311 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/516311
Polysilicon resistor structures Nov 20, 2023 Issued
Array ( [id] => 19035940 [patent_doc_number] => 20240085755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => TANDEM VISION WINDOW AND MEDIA DISPLAY [patent_app_type] => utility [patent_app_number] => 18/514589 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 55191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18514589 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/514589
Tandem vision window and media display Nov 19, 2023 Issued
Array ( [id] => 19468185 [patent_doc_number] => 20240321855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => BONDING TECHNIQUES FOR STACKED TRANSISTOR STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/513296 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20268 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18513296 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/513296
BONDING TECHNIQUES FOR STACKED TRANSISTOR STRUCTURES Nov 16, 2023 Pending
Array ( [id] => 20030865 [patent_doc_number] => 20250169087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => VERTICAL HETEROJUNCTION BIPOLAR TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/512859 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512859 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/512859
VERTICAL HETEROJUNCTION BIPOLAR TRANSISTOR Nov 16, 2023 Pending
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