Search

Mudasiru K Olaegbe

Examiner (ID: 15599)

Most Active Art Unit
2495
Art Unit(s)
2495
Total Applications
95
Issued Applications
37
Pending Applications
49
Abandoned Applications
9

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9483969 [patent_doc_number] => 08729923 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Majority vote circuit' [patent_app_type] => utility [patent_app_number] => 13/598440 [patent_app_country] => US [patent_app_date] => 2012-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 4941 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13598440 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/598440
Majority vote circuit Aug 28, 2012 Issued
Array ( [id] => 10951154 [patent_doc_number] => 20140354175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'HIGH WATT TYPE CERAMIC METAL HALIDE LAMP ILLUMINATION DEVICE' [patent_app_type] => utility [patent_app_number] => 14/344723 [patent_app_country] => US [patent_app_date] => 2012-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5270 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14344723 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/344723
HIGH WATT TYPE CERAMIC METAL HALIDE LAMP ILLUMINATION DEVICE Aug 3, 2012 Abandoned
Array ( [id] => 11780659 [patent_doc_number] => 09389841 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-12 [patent_title] => 'Methods and systems for using state vector data in a state machine engine' [patent_app_type] => utility [patent_app_number] => 13/552488 [patent_app_country] => US [patent_app_date] => 2012-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 11978 [patent_no_of_claims] => 62 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13552488 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/552488
Methods and systems for using state vector data in a state machine engine Jul 17, 2012 Issued
Array ( [id] => 10035209 [patent_doc_number] => 09076529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-07 [patent_title] => 'Level shift circuit and semiconductor device using level shift circuit' [patent_app_type] => utility [patent_app_number] => 13/549204 [patent_app_country] => US [patent_app_date] => 2012-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 27 [patent_no_of_words] => 6703 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13549204 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/549204
Level shift circuit and semiconductor device using level shift circuit Jul 12, 2012 Issued
Array ( [id] => 8765425 [patent_doc_number] => 20130093462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'CONFIGURABLE STORAGE ELEMENTS' [patent_app_type] => utility [patent_app_number] => 13/549405 [patent_app_country] => US [patent_app_date] => 2012-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 73 [patent_figures_cnt] => 73 [patent_no_of_words] => 54246 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13549405 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/549405
Configurable storage elements Jul 12, 2012 Issued
Array ( [id] => 9601060 [patent_doc_number] => 20140197741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'LED LIGHTING APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/232778 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7931 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14232778 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/232778
LED lighting apparatus Jul 11, 2012 Issued
Array ( [id] => 10845356 [patent_doc_number] => 08872540 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Method of sharing in use an impedance matching circuit of a memory circuit to perform an initial calibration and a full time refresh mode calibration, and memory circuit with an impedance matching circuit capable of being used in an initial calibration and a full time refresh mode calibration' [patent_app_type] => utility [patent_app_number] => 13/547015 [patent_app_country] => US [patent_app_date] => 2012-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2235 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13547015 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/547015
Method of sharing in use an impedance matching circuit of a memory circuit to perform an initial calibration and a full time refresh mode calibration, and memory circuit with an impedance matching circuit capable of being used in an initial calibration and a full time refresh mode calibration Jul 10, 2012 Issued
Array ( [id] => 8610568 [patent_doc_number] => 20130015880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF ADJUSTING AN IMPEDANCE OF AN OUTPUT BUFFER' [patent_app_type] => utility [patent_app_number] => 13/545701 [patent_app_country] => US [patent_app_date] => 2012-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10978 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13545701 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/545701
Semiconductor device and method of adjusting an impedance of an output buffer Jul 9, 2012 Issued
Array ( [id] => 8610567 [patent_doc_number] => 20130015879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/545618 [patent_app_country] => US [patent_app_date] => 2012-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 19054 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13545618 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/545618
Impedance adjustment circuit with correction circuit for semiconductor device Jul 9, 2012 Issued
Array ( [id] => 9376515 [patent_doc_number] => 08680780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-25 [patent_title] => 'LED backlight driving circuit, backlight module, and LCD device' [patent_app_type] => utility [patent_app_number] => 13/578140 [patent_app_country] => US [patent_app_date] => 2012-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2183 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13578140 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/578140
LED backlight driving circuit, backlight module, and LCD device Jul 8, 2012 Issued
Array ( [id] => 8604372 [patent_doc_number] => 20130009684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-10 [patent_title] => 'SEMICONDUCTOR APPARATUS AND SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/543118 [patent_app_country] => US [patent_app_date] => 2012-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 17391 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13543118 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/543118
Clock control and power management for semiconductor apparatus and system Jul 5, 2012 Issued
Array ( [id] => 8995852 [patent_doc_number] => 08519741 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-27 [patent_title] => 'Operating a programmable integrated circuit with functionally equivalent configuration bitstreams' [patent_app_type] => utility [patent_app_number] => 13/543508 [patent_app_country] => US [patent_app_date] => 2012-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3957 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13543508 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/543508
Operating a programmable integrated circuit with functionally equivalent configuration bitstreams Jul 5, 2012 Issued
Array ( [id] => 9576245 [patent_doc_number] => 08766663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Implementing linearly weighted thermal coded I/O driver output stage calibration' [patent_app_type] => utility [patent_app_number] => 13/526004 [patent_app_country] => US [patent_app_date] => 2012-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4867 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13526004 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/526004
Implementing linearly weighted thermal coded I/O driver output stage calibration Jun 17, 2012 Issued
Array ( [id] => 9189277 [patent_doc_number] => 20130328592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'TIME DIVISION MULTIPLEXED LIMITED SWITCH DYNAMIC LOGIC' [patent_app_type] => utility [patent_app_number] => 13/524562 [patent_app_country] => US [patent_app_date] => 2012-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7726 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13524562 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/524562
Time division multiplexed limited switch dynamic logic Jun 14, 2012 Issued
Array ( [id] => 9711818 [patent_doc_number] => 08836394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Method and apparatus for source-synchronous signaling' [patent_app_type] => utility [patent_app_number] => 13/523631 [patent_app_country] => US [patent_app_date] => 2012-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 35 [patent_no_of_words] => 23780 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13523631 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/523631
Method and apparatus for source-synchronous signaling Jun 13, 2012 Issued
Array ( [id] => 8933388 [patent_doc_number] => 08493093 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-07-23 [patent_title] => 'Time division multiplexed limited switch dynamic logic' [patent_app_type] => utility [patent_app_number] => 13/494607 [patent_app_country] => US [patent_app_date] => 2012-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7680 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13494607 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/494607
Time division multiplexed limited switch dynamic logic Jun 11, 2012 Issued
Array ( [id] => 9530793 [patent_doc_number] => 08754670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-17 [patent_title] => 'Real time reconfigurable logic device and semiconductor package having the same' [patent_app_type] => utility [patent_app_number] => 13/494477 [patent_app_country] => US [patent_app_date] => 2012-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 11271 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13494477 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/494477
Real time reconfigurable logic device and semiconductor package having the same Jun 11, 2012 Issued
Array ( [id] => 8681517 [patent_doc_number] => 20130049801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'FPGA configuration equipment and configuration method' [patent_app_type] => utility [patent_app_number] => 13/490291 [patent_app_country] => US [patent_app_date] => 2012-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2116 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13490291 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/490291
FPGA configuration equipment and configuration method Jun 5, 2012 Abandoned
Array ( [id] => 8514257 [patent_doc_number] => 20120313665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'BANDGAP READY CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/490236 [patent_app_country] => US [patent_app_date] => 2012-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 7750 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13490236 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/490236
Bandgap ready circuit Jun 5, 2012 Issued
Array ( [id] => 9100448 [patent_doc_number] => 08564330 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-10-22 [patent_title] => 'Methods and systems for high frequency clock distribution' [patent_app_type] => utility [patent_app_number] => 13/488915 [patent_app_country] => US [patent_app_date] => 2012-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 9404 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13488915 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/488915
Methods and systems for high frequency clock distribution Jun 4, 2012 Issued
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