Search

Mujtaba M. Chaudry

Examiner (ID: 16088, Phone: (571)272-3817 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2112, 2133
Total Applications
1571
Issued Applications
1295
Pending Applications
106
Abandoned Applications
191

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18111972 [patent_doc_number] => 20230004852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => CONVERSION METHOD, CONVERSION DEVICE, RECEPTION DEVICE, AND TRANSMISSION DEVICE [patent_app_type] => utility [patent_app_number] => 17/778750 [patent_app_country] => US [patent_app_date] => 2020-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17778750 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/778750
CONVERSION METHOD, CONVERSION DEVICE, RECEPTION DEVICE, AND TRANSMISSION DEVICE Oct 20, 2020 Abandoned
Array ( [id] => 16577402 [patent_doc_number] => 20210011803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => SYSTEMS AND METHODS FOR PERFORMING A WRITE PATTERN IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/038251 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4532 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17038251 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/038251
Systems and methods for performing a write pattern in memory devices Sep 29, 2020 Issued
Array ( [id] => 16579597 [patent_doc_number] => 20210013999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => Latency-Optimized Mechanisms for Handling Errors or Mis-Routed Packets for Computer Buses [patent_app_type] => utility [patent_app_number] => 17/031822 [patent_app_country] => US [patent_app_date] => 2020-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20042 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17031822 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/031822
Latency-Optimized Mechanisms for Handling Errors or Mis-Routed Packets for Computer Buses Sep 23, 2020 Abandoned
Array ( [id] => 18165052 [patent_doc_number] => 20230031649 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => STATIC RANDOM-ACCESS MEMORY AND FAULT DETECTION CIRCUIT THEREOF [patent_app_type] => utility [patent_app_number] => 17/790244 [patent_app_country] => US [patent_app_date] => 2020-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5458 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17790244 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/790244
STATIC RANDOM-ACCESS MEMORY AND FAULT DETECTION CIRCUIT THEREOF Sep 22, 2020 Abandoned
Array ( [id] => 17410906 [patent_doc_number] => 11251811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => Error correction circuit and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/024880 [patent_app_country] => US [patent_app_date] => 2020-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 8502 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17024880 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/024880
Error correction circuit and operating method thereof Sep 17, 2020 Issued
Array ( [id] => 17544764 [patent_doc_number] => 11309905 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Communication of user specific control information in a wireless network [patent_app_type] => utility [patent_app_number] => 17/023332 [patent_app_country] => US [patent_app_date] => 2020-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 16749 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17023332 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/023332
Communication of user specific control information in a wireless network Sep 15, 2020 Issued
Array ( [id] => 18890835 [patent_doc_number] => 11869612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Device aware test for memory units [patent_app_type] => utility [patent_app_number] => 17/639386 [patent_app_country] => US [patent_app_date] => 2020-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 9324 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17639386 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/639386
Device aware test for memory units Sep 2, 2020 Issued
Array ( [id] => 17544777 [patent_doc_number] => 11309918 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 17/005282 [patent_app_country] => US [patent_app_date] => 2020-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7684 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17005282 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/005282
Memory system Aug 26, 2020 Issued
Array ( [id] => 17430232 [patent_doc_number] => 20220057941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => SYNC-MARK DETECTION ERROR RECOVERY [patent_app_type] => utility [patent_app_number] => 17/000136 [patent_app_country] => US [patent_app_date] => 2020-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7807 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17000136 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/000136
Sync-mark detection error recovery Aug 20, 2020 Issued
Array ( [id] => 18332392 [patent_doc_number] => 11637654 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => OFDM packing and LDPC framing for constellation shaping in NG WLANs [patent_app_type] => utility [patent_app_number] => 16/998528 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6902 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998528 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998528
OFDM packing and LDPC framing for constellation shaping in NG WLANs Aug 19, 2020 Issued
Array ( [id] => 17848624 [patent_doc_number] => 11438013 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Low-power error correction code computation in GF (2R) [patent_app_type] => utility [patent_app_number] => 16/929983 [patent_app_country] => US [patent_app_date] => 2020-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4308 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16929983 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/929983
Low-power error correction code computation in GF (2R) Jul 14, 2020 Issued
Array ( [id] => 16425734 [patent_doc_number] => 20200350932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => DATA TRANSMISSION METHOD, APPARATUS, AND SYSTEM [patent_app_type] => utility [patent_app_number] => 16/929621 [patent_app_country] => US [patent_app_date] => 2020-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10000 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16929621 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/929621
Data transmission method, apparatus, and system Jul 14, 2020 Issued
Array ( [id] => 16732040 [patent_doc_number] => 20210099188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => SYSTEM AND METHOD FOR IDENTIFYING AND DECODING REED-MULLER CODES IN POLAR CODES [patent_app_type] => utility [patent_app_number] => 16/928826 [patent_app_country] => US [patent_app_date] => 2020-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16928826 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/928826
System and method for identifying and decoding Reed-Muller codes in polar codes Jul 13, 2020 Issued
Array ( [id] => 16402091 [patent_doc_number] => 20200342949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => BAD BLOCK MANAGEMENT FOR MEMORY SUB-SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/924938 [patent_app_country] => US [patent_app_date] => 2020-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16924938 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/924938
Bad block management for memory sub-systems Jul 8, 2020 Issued
Array ( [id] => 16380008 [patent_doc_number] => 20200328851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => MODEM CHIPS AND RECEIVERS FOR PERFORMING HYBRID AUTOMATIC REPEAT REQUEST PROCESSING [patent_app_type] => utility [patent_app_number] => 16/913494 [patent_app_country] => US [patent_app_date] => 2020-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12882 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16913494 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/913494
Modem chips and receivers for performing hybrid automatic repeat request processing Jun 25, 2020 Issued
Array ( [id] => 18670609 [patent_doc_number] => 11777527 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-10-03 [patent_title] => Dynamic permutation based coding for generating permuted bits and parity equations thereof [patent_app_type] => utility [patent_app_number] => 16/912422 [patent_app_country] => US [patent_app_date] => 2020-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 10802 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 459 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16912422 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/912422
Dynamic permutation based coding for generating permuted bits and parity equations thereof Jun 24, 2020 Issued
Array ( [id] => 16365331 [patent_doc_number] => 20200322082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => METHODS, SYSTEM AND USER EQUIPMENT OF A WIRELESS COMMUNICATION NETWORK FOR DETERMINING TRANSMISSION CONDITIONS FOR A REAL-TIME MEDIA FLOW [patent_app_type] => utility [patent_app_number] => 16/906520 [patent_app_country] => US [patent_app_date] => 2020-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16906520 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/906520
Methods, system and user equipment of a wireless communication network for determining transmission conditions for a real-time media flow Jun 18, 2020 Issued
Array ( [id] => 16937473 [patent_doc_number] => 20210203362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => METHOD OF INTERLEAVED POLAR CODES AND INTERLEAVED POLAR ENCODER USED THEREIN [patent_app_type] => utility [patent_app_number] => 16/899787 [patent_app_country] => US [patent_app_date] => 2020-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3212 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899787 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/899787
METHOD OF INTERLEAVED POLAR CODES AND INTERLEAVED POLAR ENCODER USED THEREIN Jun 11, 2020 Abandoned
Array ( [id] => 18632508 [patent_doc_number] => 20230291420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => INFORMATION INDICATION FOR RAPTOR CODES [patent_app_type] => utility [patent_app_number] => 18/001251 [patent_app_country] => US [patent_app_date] => 2020-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18531 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -33 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18001251 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/001251
INFORMATION INDICATION FOR RAPTOR CODES Jun 10, 2020 Pending
Array ( [id] => 17331469 [patent_doc_number] => 11221933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-11 [patent_title] => Holdup self-tests for power loss operations on memory systems [patent_app_type] => utility [patent_app_number] => 16/896168 [patent_app_country] => US [patent_app_date] => 2020-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16896168 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/896168
Holdup self-tests for power loss operations on memory systems Jun 7, 2020 Issued
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