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Muna A. Techane

Examiner (ID: 12700, Phone: (571)272-7856 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
795
Issued Applications
692
Pending Applications
77
Abandoned Applications
41

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20681944 [patent_doc_number] => 20260120769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => LOW-POWER PROGRAMMABLE ERASABLE NONVOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 19/015293 [patent_app_country] => US [patent_app_date] => 2025-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 358 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19015293 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/015293
LOW-POWER PROGRAMMABLE ERASABLE NONVOLATILE MEMORY Jan 8, 2025 Pending
Array ( [id] => 20088533 [patent_doc_number] => 20250218469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 19/004036 [patent_app_country] => US [patent_app_date] => 2024-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19004036 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/004036
ELECTRONIC DEVICE Dec 26, 2024 Pending
Array ( [id] => 20096112 [patent_doc_number] => 20250226048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => SEMICONDUCTOR DEVICE AND APPARATUS [patent_app_type] => utility [patent_app_number] => 18/979797 [patent_app_country] => US [patent_app_date] => 2024-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3193 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18979797 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/979797
SEMICONDUCTOR DEVICE AND APPARATUS Dec 12, 2024 Pending
Array ( [id] => 20053412 [patent_doc_number] => 20250191634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => MEMORY DEVICE SUPPORTING EXTENDED ROW HAMMER REFERESH OPERATION AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/972423 [patent_app_country] => US [patent_app_date] => 2024-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27376 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18972423 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/972423
MEMORY DEVICE SUPPORTING EXTENDED ROW HAMMER REFERESH OPERATION AND OPERATION METHOD THEREOF Dec 5, 2024 Pending
Array ( [id] => 19850351 [patent_doc_number] => 20250095702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => Computing-In-Memory Architecture [patent_app_type] => utility [patent_app_number] => 18/967733 [patent_app_country] => US [patent_app_date] => 2024-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18967733 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/967733
Computing-In-Memory Architecture Dec 3, 2024 Pending
Array ( [id] => 19850379 [patent_doc_number] => 20250095730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => MEMORY CIRCUIT AND METHOD FOR READING MEMORY CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/961468 [patent_app_country] => US [patent_app_date] => 2024-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18961468 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/961468
MEMORY CIRCUIT AND METHOD FOR READING MEMORY CIRCUIT Nov 26, 2024 Pending
Array ( [id] => 20352492 [patent_doc_number] => 20250349344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/961399 [patent_app_country] => US [patent_app_date] => 2024-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18961399 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/961399
MEMORY DEVICE Nov 25, 2024 Pending
Array ( [id] => 19835468 [patent_doc_number] => 20250087254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => MEMORY ARRAY WITH COMPENSATED WORD LINE ACCESS DELAY [patent_app_type] => utility [patent_app_number] => 18/958701 [patent_app_country] => US [patent_app_date] => 2024-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10802 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18958701 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/958701
MEMORY ARRAY WITH COMPENSATED WORD LINE ACCESS DELAY Nov 24, 2024 Pending
Array ( [id] => 20028500 [patent_doc_number] => 20250166722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => APPARATUS AND METHODS FOR MANAGING WEAR LEVELING IN MEMORY [patent_app_type] => utility [patent_app_number] => 18/938753 [patent_app_country] => US [patent_app_date] => 2024-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12578 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18938753 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/938753
APPARATUS AND METHODS FOR MANAGING WEAR LEVELING IN MEMORY Nov 5, 2024 Pending
Array ( [id] => 20055889 [patent_doc_number] => 20250194111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => STACKED MEMORY DEVICE WITH IMPROVED PER-DIE POWER DELIVERY [patent_app_type] => utility [patent_app_number] => 18/939265 [patent_app_country] => US [patent_app_date] => 2024-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2702 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18939265 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/939265
STACKED MEMORY DEVICE WITH IMPROVED PER-DIE POWER DELIVERY Nov 5, 2024 Pending
Array ( [id] => 19788249 [patent_doc_number] => 20250061928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => OPEN TRANSLATION UNIT MANAGEMENT USING AN ADAPTIVE READ THRESHOLD [patent_app_type] => utility [patent_app_number] => 18/936298 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8499 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936298 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/936298
OPEN TRANSLATION UNIT MANAGEMENT USING AN ADAPTIVE READ THRESHOLD Nov 3, 2024 Pending
Array ( [id] => 19757788 [patent_doc_number] => 20250046353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => DYNAMIC RANDOM ACCESS MEMORY SPEED BIN COMPATIBILITY [patent_app_type] => utility [patent_app_number] => 18/927574 [patent_app_country] => US [patent_app_date] => 2024-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15698 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18927574 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/927574
DYNAMIC RANDOM ACCESS MEMORY SPEED BIN COMPATIBILITY Oct 24, 2024 Pending
Array ( [id] => 19995528 [patent_doc_number] => 20250133750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => MEMORY ARRAY HAVING AIR GAPS [patent_app_type] => utility [patent_app_number] => 18/924077 [patent_app_country] => US [patent_app_date] => 2024-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16134 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18924077 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/924077
MEMORY ARRAY HAVING AIR GAPS Oct 22, 2024 Pending
Array ( [id] => 19757803 [patent_doc_number] => 20250046368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => NONVOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/920447 [patent_app_country] => US [patent_app_date] => 2024-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18608 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18920447 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/920447
NONVOLATILE MEMORY Oct 17, 2024 Pending
Array ( [id] => 20283350 [patent_doc_number] => 20250308592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => MEMORY DEVICE AND METHOD OF PERFORMING PROGRAM OPERATION [patent_app_type] => utility [patent_app_number] => 18/910277 [patent_app_country] => US [patent_app_date] => 2024-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18910277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/910277
MEMORY DEVICE AND METHOD OF PERFORMING PROGRAM OPERATION Oct 8, 2024 Pending
Array ( [id] => 20641859 [patent_doc_number] => 20260100216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-09 [patent_title] => DYNAMIC RANDOM-ACCESS MEMORY (DRAM) DEVICE [patent_app_type] => utility [patent_app_number] => 18/909931 [patent_app_country] => US [patent_app_date] => 2024-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18909931 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/909931
DYNAMIC RANDOM-ACCESS MEMORY (DRAM) DEVICE Oct 7, 2024 Pending
Array ( [id] => 19712366 [patent_doc_number] => 20250022508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => MEMORY DEVICE FOR IN-MEMORY COMPUTING [patent_app_type] => utility [patent_app_number] => 18/903041 [patent_app_country] => US [patent_app_date] => 2024-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18903041 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/903041
Memory device for in-memory computing Sep 30, 2024 Issued
Array ( [id] => 20618007 [patent_doc_number] => 20260088110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-26 [patent_title] => EFFICIENT TRAINING METHOD FOR UNMATCHED DATA OUTPUT PATH IN NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/896420 [patent_app_country] => US [patent_app_date] => 2024-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17724 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18896420 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/896420
EFFICIENT TRAINING METHOD FOR UNMATCHED DATA OUTPUT PATH IN NON-VOLATILE MEMORY Sep 24, 2024 Pending
Array ( [id] => 19712358 [patent_doc_number] => 20250022500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH SHARED GAIN ELEMENT AND ACCESS TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/888028 [patent_app_country] => US [patent_app_date] => 2024-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38842 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18888028 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/888028
NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH SHARED GAIN ELEMENT AND ACCESS TRANSISTOR Sep 16, 2024 Pending
Array ( [id] => 19696076 [patent_doc_number] => 20250014621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH MULTI-WAY SHARING OF GAIN ELEMENT WITH SERIES TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/888087 [patent_app_country] => US [patent_app_date] => 2024-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38825 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18888087 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/888087
NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH MULTI-WAY SHARING OF GAIN ELEMENT WITH SERIES TRANSISTOR Sep 16, 2024 Issued
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