Muna A. Techane

Array ( [id] => 20630360 [patent_doc_number] => 20260094648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-02 [patent_title] => ERASE OPERATION FOR NON-VOLATILE MEMORY CELL [patent_app_type] => utility [patent_app_number] => 19/027563 [patent_app_country] => US [patent_app_date] => 2025-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -37 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19027563 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20696688 [patent_doc_number] => 20260128101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-05-07 [patent_title] => PROGRAMMING METHOD FOR NON-VOLATILE MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 19/031281 [patent_app_country] => US [patent_app_date] => 2025-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 368 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19031281 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20182119 [patent_doc_number] => 20250266077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => PEAK POWER DEMAND BALANCING IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 19/021921 [patent_app_country] => US [patent_app_date] => 2025-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3419 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19021921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20681944 [patent_doc_number] => 20260120769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => LOW-POWER PROGRAMMABLE ERASABLE NONVOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 19/015293 [patent_app_country] => US [patent_app_date] => 2025-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 358 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19015293 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20153153 [patent_doc_number] => 20250252991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => SEMICONDUCTOR DEVICE HAVING MODE REGISTER [patent_app_type] => utility [patent_app_number] => 19/011178 [patent_app_country] => US [patent_app_date] => 2025-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19011178 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20139205 [patent_doc_number] => 20250246249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => POWER SUPPLY APPARATUS AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 19/008041 [patent_app_country] => US [patent_app_date] => 2025-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3311 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19008041 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20088533 [patent_doc_number] => 20250218469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 19/004036 [patent_app_country] => US [patent_app_date] => 2024-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19004036 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20096112 [patent_doc_number] => 20250226048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => SEMICONDUCTOR DEVICE AND APPARATUS [patent_app_type] => utility [patent_app_number] => 18/979797 [patent_app_country] => US [patent_app_date] => 2024-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3193 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18979797 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20044578 [patent_doc_number] => 20250182800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => TECHNIQUES FOR INDICATING ROW ACTIVATION [patent_app_type] => utility [patent_app_number] => 18/972223 [patent_app_country] => US [patent_app_date] => 2024-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14679 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18972223 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20053412 [patent_doc_number] => 20250191634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => MEMORY DEVICE SUPPORTING EXTENDED ROW HAMMER REFERESH OPERATION AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/972423 [patent_app_country] => US [patent_app_date] => 2024-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27376 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18972423 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20250835 [patent_doc_number] => 20250299704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/970455 [patent_app_country] => US [patent_app_date] => 2024-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4579 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18970455 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19850351 [patent_doc_number] => 20250095702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => Computing-In-Memory Architecture [patent_app_type] => utility [patent_app_number] => 18/967733 [patent_app_country] => US [patent_app_date] => 2024-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18967733 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19850379 [patent_doc_number] => 20250095730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => MEMORY CIRCUIT AND METHOD FOR READING MEMORY CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/961468 [patent_app_country] => US [patent_app_date] => 2024-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18961468 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20352492 [patent_doc_number] => 20250349344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/961399 [patent_app_country] => US [patent_app_date] => 2024-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18961399 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19835468 [patent_doc_number] => 20250087254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => MEMORY ARRAY WITH COMPENSATED WORD LINE ACCESS DELAY [patent_app_type] => utility [patent_app_number] => 18/958701 [patent_app_country] => US [patent_app_date] => 2024-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10802 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18958701 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20055889 [patent_doc_number] => 20250194111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => STACKED MEMORY DEVICE WITH IMPROVED PER-DIE POWER DELIVERY [patent_app_type] => utility [patent_app_number] => 18/939265 [patent_app_country] => US [patent_app_date] => 2024-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2702 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18939265 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20028500 [patent_doc_number] => 20250166722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => APPARATUS AND METHODS FOR MANAGING WEAR LEVELING IN MEMORY [patent_app_type] => utility [patent_app_number] => 18/938753 [patent_app_country] => US [patent_app_date] => 2024-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12578 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18938753 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19788249 [patent_doc_number] => 20250061928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => OPEN TRANSLATION UNIT MANAGEMENT USING AN ADAPTIVE READ THRESHOLD [patent_app_type] => utility [patent_app_number] => 18/936298 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8499 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936298 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19757788 [patent_doc_number] => 20250046353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => DYNAMIC RANDOM ACCESS MEMORY SPEED BIN COMPATIBILITY [patent_app_type] => utility [patent_app_number] => 18/927574 [patent_app_country] => US [patent_app_date] => 2024-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15698 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18927574 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19995528 [patent_doc_number] => 20250133750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => MEMORY ARRAY HAVING AIR GAPS [patent_app_type] => utility [patent_app_number] => 18/924077 [patent_app_country] => US [patent_app_date] => 2024-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16134 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18924077 [rel_patent_id] =>[rel_patent_doc_number] =>)