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Muna A. Techane

Examiner (ID: 931, Phone: (571)272-7856 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
771
Issued Applications
673
Pending Applications
72
Abandoned Applications
41

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19788249 [patent_doc_number] => 20250061928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => OPEN TRANSLATION UNIT MANAGEMENT USING AN ADAPTIVE READ THRESHOLD [patent_app_type] => utility [patent_app_number] => 18/936298 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8499 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936298 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/936298
OPEN TRANSLATION UNIT MANAGEMENT USING AN ADAPTIVE READ THRESHOLD Nov 3, 2024 Pending
Array ( [id] => 19995528 [patent_doc_number] => 20250133750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => MEMORY ARRAY HAVING AIR GAPS [patent_app_type] => utility [patent_app_number] => 18/924077 [patent_app_country] => US [patent_app_date] => 2024-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16134 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18924077 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/924077
MEMORY ARRAY HAVING AIR GAPS Oct 22, 2024 Pending
Array ( [id] => 20283350 [patent_doc_number] => 20250308592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => MEMORY DEVICE AND METHOD OF PERFORMING PROGRAM OPERATION [patent_app_type] => utility [patent_app_number] => 18/910277 [patent_app_country] => US [patent_app_date] => 2024-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18910277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/910277
MEMORY DEVICE AND METHOD OF PERFORMING PROGRAM OPERATION Oct 8, 2024 Pending
Array ( [id] => 19712366 [patent_doc_number] => 20250022508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => MEMORY DEVICE FOR IN-MEMORY COMPUTING [patent_app_type] => utility [patent_app_number] => 18/903041 [patent_app_country] => US [patent_app_date] => 2024-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18903041 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/903041
MEMORY DEVICE FOR IN-MEMORY COMPUTING Sep 30, 2024 Pending
Array ( [id] => 20618007 [patent_doc_number] => 20260088110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-26 [patent_title] => EFFICIENT TRAINING METHOD FOR UNMATCHED DATA OUTPUT PATH IN NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/896420 [patent_app_country] => US [patent_app_date] => 2024-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17724 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18896420 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/896420
EFFICIENT TRAINING METHOD FOR UNMATCHED DATA OUTPUT PATH IN NON-VOLATILE MEMORY Sep 24, 2024 Pending
Array ( [id] => 19712358 [patent_doc_number] => 20250022500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH SHARED GAIN ELEMENT AND ACCESS TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/888028 [patent_app_country] => US [patent_app_date] => 2024-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38842 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18888028 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/888028
NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH SHARED GAIN ELEMENT AND ACCESS TRANSISTOR Sep 16, 2024 Pending
Array ( [id] => 19696076 [patent_doc_number] => 20250014621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH MULTI-WAY SHARING OF GAIN ELEMENT WITH SERIES TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/888087 [patent_app_country] => US [patent_app_date] => 2024-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38825 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18888087 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/888087
NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH MULTI-WAY SHARING OF GAIN ELEMENT WITH SERIES TRANSISTOR Sep 16, 2024 Pending
Array ( [id] => 19879621 [patent_doc_number] => 20250111878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => ROW DECODER CIRCUIT AND CORRESPONDING METHOD OF OPERATION [patent_app_type] => utility [patent_app_number] => 18/883201 [patent_app_country] => US [patent_app_date] => 2024-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18883201 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/883201
ROW DECODER CIRCUIT AND CORRESPONDING METHOD OF OPERATION Sep 11, 2024 Pending
Array ( [id] => 20572057 [patent_doc_number] => 20260065985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-05 [patent_title] => ADDRESS PATH ROUTING REDUCTION STRATEGY FOR NONVOLATILE MEMORY DECODERS [patent_app_type] => utility [patent_app_number] => 18/825487 [patent_app_country] => US [patent_app_date] => 2024-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13618 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18825487 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/825487
ADDRESS PATH ROUTING REDUCTION STRATEGY FOR NONVOLATILE MEMORY DECODERS Sep 4, 2024 Pending
Array ( [id] => 20250862 [patent_doc_number] => 20250299731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/821016 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821016 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/821016
SEMICONDUCTOR DEVICE Aug 29, 2024 Pending
Array ( [id] => 19850405 [patent_doc_number] => 20250095756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM, AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/821402 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821402 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/821402
SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM, AND CONTROL METHOD Aug 29, 2024 Pending
Array ( [id] => 20182144 [patent_doc_number] => 20250266102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => MEMORY DEVICE, MEMORY SYSTEM, MEMORY CONTROLLER AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/807590 [patent_app_country] => US [patent_app_date] => 2024-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18807590 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/807590
MEMORY DEVICE, MEMORY SYSTEM, MEMORY CONTROLLER AND OPERATING METHOD THEREOF Aug 15, 2024 Pending
Array ( [id] => 19618892 [patent_doc_number] => 20240404572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => APPARATUS, MEMORY CONTROLLER, MEMORY DEVICE, MEMORY SYSTEM, AND METHOD FOR CLOCK SWITCHING AND LOW POWER CONSUMPTION [patent_app_type] => utility [patent_app_number] => 18/806359 [patent_app_country] => US [patent_app_date] => 2024-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18297 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18806359 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/806359
APPARATUS, MEMORY CONTROLLER, MEMORY DEVICE, MEMORY SYSTEM, AND METHOD FOR CLOCK SWITCHING AND LOW POWER CONSUMPTION Aug 14, 2024 Pending
Array ( [id] => 20514506 [patent_doc_number] => 20260038608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => ADAPTIVE READ DISTURB SCAN FOR ASYMMETRIC BLOCKS [patent_app_type] => utility [patent_app_number] => 18/791177 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3474 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18791177 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/791177
ADAPTIVE READ DISTURB SCAN FOR ASYMMETRIC BLOCKS Jul 30, 2024 Pending
Array ( [id] => 19589420 [patent_doc_number] => 20240386977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => HIGH-DENSITY & HIGH-VOLTAGE-TOLERABLE PURE CORE MEMORY CELL [patent_app_type] => utility [patent_app_number] => 18/787706 [patent_app_country] => US [patent_app_date] => 2024-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8193 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18787706 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/787706
HIGH-DENSITY & HIGH-VOLTAGE-TOLERABLE PURE CORE MEMORY CELL Jul 28, 2024 Pending
Array ( [id] => 19589411 [patent_doc_number] => 20240386968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => SYSTEM AND METHOD FOR RELIABLE SENSING OF MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 18/787791 [patent_app_country] => US [patent_app_date] => 2024-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8782 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18787791 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/787791
SYSTEM AND METHOD FOR RELIABLE SENSING OF MEMORY CELLS Jul 28, 2024 Pending
Array ( [id] => 20501699 [patent_doc_number] => 20260031161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => EFFICIENT EMPTY PAGE SCAN OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/785902 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5067 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18785902 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/785902
EFFICIENT EMPTY PAGE SCAN OPERATIONS Jul 25, 2024 Pending
Array ( [id] => 19788281 [patent_doc_number] => 20250061960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => MEMORY DEVICE WITH A STORAGE COMPONENT [patent_app_type] => utility [patent_app_number] => 18/786291 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18786291 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/786291
MEMORY DEVICE WITH A STORAGE COMPONENT Jul 25, 2024 Pending
Array ( [id] => 20551406 [patent_doc_number] => 12562204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-24 [patent_title] => Non-linear polar material based multi-capacitor bit-cell with shared gain element with series transistor and individual access transistor [patent_app_type] => utility [patent_app_number] => 18/781878 [patent_app_country] => US [patent_app_date] => 2024-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 56 [patent_no_of_words] => 34283 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18781878 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/781878
Non-linear polar material based multi-capacitor bit-cell with shared gain element with series transistor and individual access transistor Jul 22, 2024 Issued
Array ( [id] => 19574852 [patent_doc_number] => 20240379144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH SHARED GAIN ELEMENT WITH SERIES TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/781916 [patent_app_country] => US [patent_app_date] => 2024-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18781916 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/781916
NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH SHARED GAIN ELEMENT WITH SERIES TRANSISTOR Jul 22, 2024 Pending
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