Search

Muna A. Techane

Examiner (ID: 931, Phone: (571)272-7856 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
771
Issued Applications
673
Pending Applications
72
Abandoned Applications
41

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18223451 [patent_doc_number] => 20230062445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => INTEGRATED COMMAND TO CALIBRATE READ VOLTAGE LEVEL [patent_app_type] => utility [patent_app_number] => 17/682089 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12690 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17682089 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/682089
Integrated command to calibrate read voltage level Feb 27, 2022 Issued
Array ( [id] => 18126713 [patent_doc_number] => 20230012334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => ANTI-FUSE MEMORY CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/674882 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5910 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17674882 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/674882
Anti-fuse memory circuit Feb 17, 2022 Issued
Array ( [id] => 18174947 [patent_doc_number] => 11574664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Parsing stream identifiers to determine data stream attributes [patent_app_type] => utility [patent_app_number] => 17/675945 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6906 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17675945 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/675945
Parsing stream identifiers to determine data stream attributes Feb 17, 2022 Issued
Array ( [id] => 18645458 [patent_doc_number] => 11769536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => Signal generating circuit and method, and semiconductor memory [patent_app_type] => utility [patent_app_number] => 17/651475 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6072 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651475 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651475
Signal generating circuit and method, and semiconductor memory Feb 16, 2022 Issued
Array ( [id] => 18969376 [patent_doc_number] => 11903188 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Memory devices, semiconductor devices, and methods of operating a memory device [patent_app_type] => utility [patent_app_number] => 17/673126 [patent_app_country] => US [patent_app_date] => 2022-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 26 [patent_no_of_words] => 18493 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17673126 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/673126
Memory devices, semiconductor devices, and methods of operating a memory device Feb 15, 2022 Issued
Array ( [id] => 19183575 [patent_doc_number] => 11990171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-21 [patent_title] => Threshold voltage-programmable field effect transistor-based memory cells and look-up table implemented using the memory cells [patent_app_type] => utility [patent_app_number] => 17/671652 [patent_app_country] => US [patent_app_date] => 2022-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 10896 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17671652 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/671652
Threshold voltage-programmable field effect transistor-based memory cells and look-up table implemented using the memory cells Feb 14, 2022 Issued
Array ( [id] => 18446863 [patent_doc_number] => 11682438 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-06-20 [patent_title] => Data writing control device and data writing control method thereof [patent_app_type] => utility [patent_app_number] => 17/671618 [patent_app_country] => US [patent_app_date] => 2022-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5600 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17671618 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/671618
Data writing control device and data writing control method thereof Feb 14, 2022 Issued
Array ( [id] => 18572630 [patent_doc_number] => 20230262968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/672053 [patent_app_country] => US [patent_app_date] => 2022-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6018 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17672053 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/672053
Semiconductor device and method of operating the same Feb 14, 2022 Issued
Array ( [id] => 18276914 [patent_doc_number] => 11615860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Memory readout circuit and method [patent_app_type] => utility [patent_app_number] => 17/671372 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 15490 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17671372 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/671372
Memory readout circuit and method Feb 13, 2022 Issued
Array ( [id] => 19244345 [patent_doc_number] => 12014796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Memory device and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/669628 [patent_app_country] => US [patent_app_date] => 2022-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6189 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17669628 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/669628
Memory device and method of operating the same Feb 10, 2022 Issued
Array ( [id] => 19356737 [patent_doc_number] => 12057192 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Memory interface mapping [patent_app_type] => utility [patent_app_number] => 17/668571 [patent_app_country] => US [patent_app_date] => 2022-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7002 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17668571 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/668571
Memory interface mapping Feb 9, 2022 Issued
Array ( [id] => 17854932 [patent_doc_number] => 20220284975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => VOLTAGE TRIMMING CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/591987 [patent_app_country] => US [patent_app_date] => 2022-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17591987 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/591987
Voltage trimming circuit Feb 2, 2022 Issued
Array ( [id] => 17752492 [patent_doc_number] => 20220230697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => COUNTER-BASED READ IN MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/590532 [patent_app_country] => US [patent_app_date] => 2022-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21950 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17590532 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/590532
Counter-based read in memory device Jan 31, 2022 Issued
Array ( [id] => 19427962 [patent_doc_number] => 12087390 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Storage device based on daisy chain topology [patent_app_type] => utility [patent_app_number] => 17/587056 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8382 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17587056 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/587056
Storage device based on daisy chain topology Jan 27, 2022 Issued
Array ( [id] => 19582361 [patent_doc_number] => 12148487 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => High-density and high-voltage-tolerable pure core memory cell [patent_app_type] => utility [patent_app_number] => 17/587242 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17587242 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/587242
High-density and high-voltage-tolerable pure core memory cell Jan 27, 2022 Issued
Array ( [id] => 19328623 [patent_doc_number] => 12046312 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => eFUSE one-time programmable memory with inter integrated circuit (I2C) communication and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/584586 [patent_app_country] => US [patent_app_date] => 2022-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 13913 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17584586 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/584586
eFUSE one-time programmable memory with inter integrated circuit (I2C) communication and operation method thereof Jan 25, 2022 Issued
Array ( [id] => 18480984 [patent_doc_number] => 11694735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Memory controller and method of controlling the memory controller [patent_app_type] => utility [patent_app_number] => 17/578797 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4218 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 321 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17578797 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/578797
Memory controller and method of controlling the memory controller Jan 18, 2022 Issued
Array ( [id] => 18061445 [patent_doc_number] => 20220392531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/575724 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18997 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17575724 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/575724
Semiconductor memory device Jan 13, 2022 Issued
Array ( [id] => 17963406 [patent_doc_number] => 20220343987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => OTP Memory and Method for Manufacturing thereof, and OTP Circuit [patent_app_type] => utility [patent_app_number] => 17/647845 [patent_app_country] => US [patent_app_date] => 2022-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4766 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17647845 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/647845
OTP memory and method for manufacturing thereof, and OTP circuit Jan 11, 2022 Issued
Array ( [id] => 18528542 [patent_doc_number] => 11715540 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Anti-fuse device [patent_app_type] => utility [patent_app_number] => 17/569450 [patent_app_country] => US [patent_app_date] => 2022-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4195 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569450 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/569450
Anti-fuse device Jan 4, 2022 Issued
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