Search

Muna A. Techane

Examiner (ID: 931, Phone: (571)272-7856 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
771
Issued Applications
673
Pending Applications
72
Abandoned Applications
41

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18623587 [patent_doc_number] => 11756641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Method for determining status of a fuse element [patent_app_type] => utility [patent_app_number] => 17/568100 [patent_app_country] => US [patent_app_date] => 2022-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 16984 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17568100 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/568100
Method for determining status of a fuse element Jan 3, 2022 Issued
Array ( [id] => 18488158 [patent_doc_number] => 20230215506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => SEMICONDUCTOR CIRCUIT AND SEMICONDUCTOR DEVICE FOR DETERMINING STATUS OF A FUSE ELEMENT [patent_app_type] => utility [patent_app_number] => 17/568052 [patent_app_country] => US [patent_app_date] => 2022-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16922 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17568052 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/568052
Semiconductor circuit and semiconductor device for determining status of a fuse element Jan 3, 2022 Issued
Array ( [id] => 18061417 [patent_doc_number] => 20220392503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/567306 [patent_app_country] => US [patent_app_date] => 2022-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6821 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17567306 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/567306
Memory device, memory system including the same and operating method thereof Jan 2, 2022 Issued
Array ( [id] => 20636578 [patent_doc_number] => 12597459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-07 [patent_title] => Apparatuses and methods for row hammer counter mat [patent_app_type] => utility [patent_app_number] => 17/565187 [patent_app_country] => US [patent_app_date] => 2021-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 12250 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17565187 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/565187
Apparatuses and methods for row hammer counter mat Dec 28, 2021 Issued
Array ( [id] => 18401914 [patent_doc_number] => 11664058 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-05-30 [patent_title] => Memory device and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/564340 [patent_app_country] => US [patent_app_date] => 2021-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4363 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17564340 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/564340
Memory device and operation method thereof Dec 28, 2021 Issued
Array ( [id] => 18912890 [patent_doc_number] => 11875875 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Variable tick for DRAM interface calibration [patent_app_type] => utility [patent_app_number] => 17/564426 [patent_app_country] => US [patent_app_date] => 2021-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5709 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17564426 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/564426
Variable tick for DRAM interface calibration Dec 28, 2021 Issued
Array ( [id] => 18125659 [patent_doc_number] => 20230011276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => MEMORY DEVICE FOR TERNARY COMPUTING [patent_app_type] => utility [patent_app_number] => 17/562568 [patent_app_country] => US [patent_app_date] => 2021-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8940 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17562568 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/562568
MEMORY DEVICE FOR TERNARY COMPUTING Dec 26, 2021 Abandoned
Array ( [id] => 18304264 [patent_doc_number] => 11626177 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-04-11 [patent_title] => Anti-fuse sensing device and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/560287 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4874 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560287 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560287
Anti-fuse sensing device and operation method thereof Dec 22, 2021 Issued
Array ( [id] => 18024449 [patent_doc_number] => 20220375948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => ONE-TIME PROGRAMMABLE (OTP) MEMORY DEVICE AND METHOD OF OPERATING AN OTP MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/558884 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558884 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558884
One-time programmable (OTP) memory device and method of operating an OTP memory device Dec 21, 2021 Issued
Array ( [id] => 17536438 [patent_doc_number] => 20220115047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => Circuits And Methods For Sub-Bank Sharing Of External Interfaces [patent_app_type] => utility [patent_app_number] => 17/560086 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5752 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560086 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560086
Circuits And Methods For Sub-Bank Sharing Of External Interfaces Dec 21, 2021 Pending
Array ( [id] => 18528513 [patent_doc_number] => 11715511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Trim level adjustments for memory based on data use [patent_app_type] => utility [patent_app_number] => 17/558099 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10549 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558099 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558099
Trim level adjustments for memory based on data use Dec 20, 2021 Issued
Array ( [id] => 18918974 [patent_doc_number] => 11881262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Low-consumption RRAM memory differential reading [patent_app_type] => utility [patent_app_number] => 17/557868 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 37 [patent_no_of_words] => 16439 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 509 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17557868 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/557868
Low-consumption RRAM memory differential reading Dec 20, 2021 Issued
Array ( [id] => 18155921 [patent_doc_number] => 11568910 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 17/550338 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 63 [patent_no_of_words] => 40599 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17550338 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/550338
Memory system Dec 13, 2021 Issued
Array ( [id] => 18918996 [patent_doc_number] => 11881284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Open translation unit management using an adaptive read threshold [patent_app_type] => utility [patent_app_number] => 17/546431 [patent_app_country] => US [patent_app_date] => 2021-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8447 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17546431 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/546431
Open translation unit management using an adaptive read threshold Dec 8, 2021 Issued
Array ( [id] => 18205230 [patent_doc_number] => 11587632 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-02-21 [patent_title] => Semiconductor device structure having fuse elements [patent_app_type] => utility [patent_app_number] => 17/542705 [patent_app_country] => US [patent_app_date] => 2021-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9207 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17542705 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/542705
Semiconductor device structure having fuse elements Dec 5, 2021 Issued
Array ( [id] => 18190426 [patent_doc_number] => 11581027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Memory sense amplifier trimming [patent_app_type] => utility [patent_app_number] => 17/543046 [patent_app_country] => US [patent_app_date] => 2021-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6722 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17543046 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/543046
Memory sense amplifier trimming Dec 5, 2021 Issued
Array ( [id] => 18967224 [patent_doc_number] => 11901002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => RRAM filament spatial localization using a laser stimulation [patent_app_type] => utility [patent_app_number] => 17/539295 [patent_app_country] => US [patent_app_date] => 2021-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 9806 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17539295 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/539295
RRAM filament spatial localization using a laser stimulation Nov 30, 2021 Issued
Array ( [id] => 17764530 [patent_doc_number] => 20220238143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => TRIM/TEST INTERFACE FOR DEVICES WITH LOW PIN COUNT OR ANALOG OR NO-CONNECT PINS [patent_app_type] => utility [patent_app_number] => 17/537872 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8148 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17537872 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/537872
Trim/test interface for devices with low pin count or analog or no-connect pins Nov 29, 2021 Issued
Array ( [id] => 18408647 [patent_doc_number] => 20230170000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => Memory with Single-Ended Sensing Using Reset-Set Latch [patent_app_type] => utility [patent_app_number] => 17/456773 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7293 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17456773 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/456773
Memory with single-ended sensing using reset-set latch Nov 28, 2021 Issued
Array ( [id] => 17676368 [patent_doc_number] => 20220189535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => MEMORY CONTROLLER AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/536803 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4470 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536803 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/536803
Memory controller and memory system Nov 28, 2021 Issued
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