Search

Muna A. Techane

Examiner (ID: 6002, Phone: (571)272-7856 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
804
Issued Applications
695
Pending Applications
83
Abandoned Applications
41

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19757803 [patent_doc_number] => 20250046368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => NONVOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/920447 [patent_app_country] => US [patent_app_date] => 2024-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18608 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18920447 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/920447
NONVOLATILE MEMORY Oct 17, 2024 Pending
Array ( [id] => 20283350 [patent_doc_number] => 20250308592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => MEMORY DEVICE AND METHOD OF PERFORMING PROGRAM OPERATION [patent_app_type] => utility [patent_app_number] => 18/910277 [patent_app_country] => US [patent_app_date] => 2024-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18910277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/910277
MEMORY DEVICE AND METHOD OF PERFORMING PROGRAM OPERATION Oct 8, 2024 Pending
Array ( [id] => 20641859 [patent_doc_number] => 20260100216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-09 [patent_title] => DYNAMIC RANDOM-ACCESS MEMORY (DRAM) DEVICE [patent_app_type] => utility [patent_app_number] => 18/909931 [patent_app_country] => US [patent_app_date] => 2024-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18909931 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/909931
DYNAMIC RANDOM-ACCESS MEMORY (DRAM) DEVICE Oct 7, 2024 Pending
Array ( [id] => 19712366 [patent_doc_number] => 20250022508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => MEMORY DEVICE FOR IN-MEMORY COMPUTING [patent_app_type] => utility [patent_app_number] => 18/903041 [patent_app_country] => US [patent_app_date] => 2024-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18903041 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/903041
Memory device for in-memory computing Sep 30, 2024 Issued
Array ( [id] => 20618007 [patent_doc_number] => 20260088110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-26 [patent_title] => EFFICIENT TRAINING METHOD FOR UNMATCHED DATA OUTPUT PATH IN NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/896420 [patent_app_country] => US [patent_app_date] => 2024-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17724 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18896420 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/896420
EFFICIENT TRAINING METHOD FOR UNMATCHED DATA OUTPUT PATH IN NON-VOLATILE MEMORY Sep 24, 2024 Pending
Array ( [id] => 19696076 [patent_doc_number] => 20250014621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH MULTI-WAY SHARING OF GAIN ELEMENT WITH SERIES TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/888087 [patent_app_country] => US [patent_app_date] => 2024-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38825 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18888087 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/888087
Non-linear polar material based multi-capacitor bit-cell with multi-way sharing of gain element with series transistor Sep 16, 2024 Issued
Array ( [id] => 19712358 [patent_doc_number] => 20250022500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH SHARED GAIN ELEMENT AND ACCESS TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/888028 [patent_app_country] => US [patent_app_date] => 2024-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38842 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18888028 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/888028
NON-LINEAR POLAR MATERIAL BASED MULTI-CAPACITOR BIT-CELL WITH SHARED GAIN ELEMENT AND ACCESS TRANSISTOR Sep 16, 2024 Pending
Array ( [id] => 19879621 [patent_doc_number] => 20250111878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => ROW DECODER CIRCUIT AND CORRESPONDING METHOD OF OPERATION [patent_app_type] => utility [patent_app_number] => 18/883201 [patent_app_country] => US [patent_app_date] => 2024-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18883201 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/883201
ROW DECODER CIRCUIT AND CORRESPONDING METHOD OF OPERATION Sep 11, 2024 Pending
Array ( [id] => 19687698 [patent_doc_number] => 20250006243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => APPARATUSES AND METHODS FOR ACCESS BASED TARGETED REFRESH OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/829734 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829734 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/829734
APPARATUSES AND METHODS FOR ACCESS BASED TARGETED REFRESH OPERATIONS Sep 9, 2024 Pending
Array ( [id] => 20829370 [patent_doc_number] => 12682948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-14 [patent_title] => Address path routing reduction strategy for nonvolatile memory decoders [patent_app_type] => utility [patent_app_number] => 18/825487 [patent_app_country] => US [patent_app_date] => 2024-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 41 [patent_no_of_words] => 13700 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18825487 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/825487
Address path routing reduction strategy for nonvolatile memory decoders Sep 4, 2024 Issued
Array ( [id] => 19850405 [patent_doc_number] => 20250095756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM, AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/821402 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821402 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/821402
SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM, AND CONTROL METHOD Aug 29, 2024 Issued
Array ( [id] => 20250862 [patent_doc_number] => 20250299731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/821016 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821016 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/821016
Semiconductor device Aug 29, 2024 Issued
Array ( [id] => 20352517 [patent_doc_number] => 20250349369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => MEMORY CONTROLLERS, MEMORY SYSTEMS, AND CONTROL METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/816752 [patent_app_country] => US [patent_app_date] => 2024-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13386 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18816752 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/816752
MEMORY CONTROLLERS, MEMORY SYSTEMS, AND CONTROL METHODS THEREOF Aug 26, 2024 Pending
Array ( [id] => 20182144 [patent_doc_number] => 20250266102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => MEMORY DEVICE, MEMORY SYSTEM, MEMORY CONTROLLER AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/807590 [patent_app_country] => US [patent_app_date] => 2024-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18807590 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/807590
Memory device, memory system, memory controller and operating method thereof Aug 15, 2024 Issued
Array ( [id] => 20774552 [patent_doc_number] => 12658231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Apparatus, memory controller, memory device, memory system, and method for clock switching and low power consumption [patent_app_type] => utility [patent_app_number] => 18/806359 [patent_app_country] => US [patent_app_date] => 2024-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 12944 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18806359 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/806359
Apparatus, memory controller, memory device, memory system, and method for clock switching and low power consumption Aug 14, 2024 Issued
Array ( [id] => 19604412 [patent_doc_number] => 20240395292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => STORAGE DEVICE BASED ON DAISY CHAIN TOPOLOGY [patent_app_type] => utility [patent_app_number] => 18/797533 [patent_app_country] => US [patent_app_date] => 2024-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8398 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18797533 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/797533
STORAGE DEVICE BASED ON DAISY CHAIN TOPOLOGY Aug 7, 2024 Pending
Array ( [id] => 19604443 [patent_doc_number] => 20240395323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => Content Addressable Memory Device Having Electrically Floating Body Transistor [patent_app_type] => utility [patent_app_number] => 18/791456 [patent_app_country] => US [patent_app_date] => 2024-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18791456 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/791456
Content Addressable Memory Device Having Electrically Floating Body Transistor Jul 31, 2024 Pending
Array ( [id] => 20514506 [patent_doc_number] => 20260038608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => ADAPTIVE READ DISTURB SCAN FOR ASYMMETRIC BLOCKS [patent_app_type] => utility [patent_app_number] => 18/791177 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3474 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18791177 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/791177
ADAPTIVE READ DISTURB SCAN FOR ASYMMETRIC BLOCKS Jul 30, 2024 Pending
Array ( [id] => 19604458 [patent_doc_number] => 20240395338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => READ VOLTAGE LEVEL BIN SELECTION [patent_app_type] => utility [patent_app_number] => 18/790480 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12712 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18790480 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/790480
Read voltage level bin selection Jul 30, 2024 Issued
Array ( [id] => 20283343 [patent_doc_number] => 20250308585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => BTI-AWARE MEMORY CIRCUITS AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/789274 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8020 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789274 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/789274
BTI-AWARE MEMORY CIRCUITS AND METHODS FOR OPERATING THE SAME Jul 29, 2024 Pending
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