
Muna A. Techane
Examiner (ID: 6002, Phone: (571)272-7856 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2827 |
| Total Applications | 804 |
| Issued Applications | 695 |
| Pending Applications | 83 |
| Abandoned Applications | 41 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17130063
[patent_doc_number] => 20210304832
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => MEMORY READOUT CIRCUIT AND METHOD
[patent_app_type] => utility
[patent_app_number] => 17/028837
[patent_app_country] => US
[patent_app_date] => 2020-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14880
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17028837
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/028837 | Memory readout circuit and method | Sep 21, 2020 | Issued |
Array
(
[id] => 16765270
[patent_doc_number] => 20210110852
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-15
[patent_title] => FIRST ORDER MEMORY-LESS DYNAMIC ELEMENT MATCHING TECHNIQUE
[patent_app_type] => utility
[patent_app_number] => 17/015271
[patent_app_country] => US
[patent_app_date] => 2020-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11462
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -33
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17015271
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/015271 | First order memory-less dynamic element matching technique | Sep 8, 2020 | Issued |
Array
(
[id] => 16858136
[patent_doc_number] => 20210158881
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-27
[patent_title] => ANTI-FUSE ONE-TIME PROGRAMMABLE MEMORY CELL AND RELATED ARRAY STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/012073
[patent_app_country] => US
[patent_app_date] => 2020-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2661
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17012073
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/012073 | Anti-fuse one-time programmable memory cell and related array structure | Sep 3, 2020 | Issued |
Array
(
[id] => 18839983
[patent_doc_number] => 11848062
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-19
[patent_title] => Voltage control method and voltage control circuit for anti-fuse memory array
[patent_app_type] => utility
[patent_app_number] => 17/925320
[patent_app_country] => US
[patent_app_date] => 2020-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 7617
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17925320
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/925320 | Voltage control method and voltage control circuit for anti-fuse memory array | Aug 31, 2020 | Issued |
Array
(
[id] => 17239610
[patent_doc_number] => 11183502
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-11-23
[patent_title] => Memory cell and Method for reading out data therefrom
[patent_app_type] => utility
[patent_app_number] => 16/997938
[patent_app_country] => US
[patent_app_date] => 2020-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 5476
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16997938
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/997938 | Memory cell and Method for reading out data therefrom | Aug 19, 2020 | Issued |
Array
(
[id] => 16624597
[patent_doc_number] => 20210043250
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-11
[patent_title] => MEMORY WITH EXPANDABLE ROW WIDTH
[patent_app_type] => utility
[patent_app_number] => 16/996024
[patent_app_country] => US
[patent_app_date] => 2020-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7251
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16996024
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/996024 | Memory with expandable row width | Aug 17, 2020 | Issued |
Array
(
[id] => 16487836
[patent_doc_number] => 20200381445
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-03
[patent_title] => SINGLE POLY NON-VOLATILE MEMORY DEVICE, METHOD OF MANUFACTURING THE SAME AND SINGLE POLY NON-VOLATILE MEMORY DEVICE ARRAY
[patent_app_type] => utility
[patent_app_number] => 16/994959
[patent_app_country] => US
[patent_app_date] => 2020-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8861
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16994959
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/994959 | Single poly non-volatile memory device, method of manufacturing the same and single poly non-volatile memory device array | Aug 16, 2020 | Issued |
Array
(
[id] => 16746217
[patent_doc_number] => 10971217
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-04-06
[patent_title] => SRAM cell for interleaved wordline scheme
[patent_app_type] => utility
[patent_app_number] => 16/991366
[patent_app_country] => US
[patent_app_date] => 2020-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7340
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16991366
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/991366 | SRAM cell for interleaved wordline scheme | Aug 11, 2020 | Issued |
Array
(
[id] => 17415833
[patent_doc_number] => 20220050737
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-17
[patent_title] => INTERNAL SIGNAL MONITORING CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 16/992007
[patent_app_country] => US
[patent_app_date] => 2020-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3604
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16992007
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/992007 | Internal signal monitoring circuit | Aug 11, 2020 | Issued |
Array
(
[id] => 17152257
[patent_doc_number] => 11145344
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-10-12
[patent_title] => One time programmable anti-fuse physical unclonable function
[patent_app_type] => utility
[patent_app_number] => 16/986957
[patent_app_country] => US
[patent_app_date] => 2020-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 5543
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16986957
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/986957 | One time programmable anti-fuse physical unclonable function | Aug 5, 2020 | Issued |
Array
(
[id] => 16438960
[patent_doc_number] => 20200356286
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-12
[patent_title] => APPARATUSES AND METHODS TO CHANGE DATA CATEGORY VALUES
[patent_app_type] => utility
[patent_app_number] => 16/939999
[patent_app_country] => US
[patent_app_date] => 2020-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23174
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16939999
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/939999 | Apparatuses and methods to change data category values | Jul 26, 2020 | Issued |
Array
(
[id] => 16888669
[patent_doc_number] => 20210174866
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-10
[patent_title] => MEMORY AND MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/939696
[patent_app_country] => US
[patent_app_date] => 2020-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4354
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16939696
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/939696 | Memory and memory system | Jul 26, 2020 | Issued |
Array
(
[id] => 16616965
[patent_doc_number] => 20210035618
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-04
[patent_title] => MEMORY CONTROLLER, METHOD FOR READ CONTROL OF MEMORY, AND ASSOCIATED STORAGE SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/937539
[patent_app_country] => US
[patent_app_date] => 2020-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4509
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16937539
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/937539 | Memory controller, method for read control of memory, and associated storage system | Jul 22, 2020 | Issued |
Array
(
[id] => 17566330
[patent_doc_number] => 20220130479
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-28
[patent_title] => Programmable Memory Cell, Memory Array and Reading And Writing Method Thereof
[patent_app_type] => utility
[patent_app_number] => 17/432791
[patent_app_country] => US
[patent_app_date] => 2020-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6105
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17432791
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/432791 | Programmable memory cell, memory array and reading and writing method thereof | Jul 22, 2020 | Issued |
Array
(
[id] => 17032571
[patent_doc_number] => 11094388
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-08-17
[patent_title] => Anti-fuse device and program method using the same
[patent_app_type] => utility
[patent_app_number] => 16/933973
[patent_app_country] => US
[patent_app_date] => 2020-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 4126
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16933973
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/933973 | Anti-fuse device and program method using the same | Jul 19, 2020 | Issued |
Array
(
[id] => 17002337
[patent_doc_number] => 11081159
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-08-03
[patent_title] => Memory cell arrangement and methods thereof
[patent_app_type] => utility
[patent_app_number] => 16/929932
[patent_app_country] => US
[patent_app_date] => 2020-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 24
[patent_no_of_words] => 21035
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16929932
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/929932 | Memory cell arrangement and methods thereof | Jul 14, 2020 | Issued |
Array
(
[id] => 16378145
[patent_doc_number] => 20200326987
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-10-15
[patent_title] => APPARATUSES AND METHODS TO DETERMINE TIMING OF OPERATIONS
[patent_app_type] => utility
[patent_app_number] => 16/914611
[patent_app_country] => US
[patent_app_date] => 2020-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22858
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16914611
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/914611 | Apparatuses and methods to determine timing of operations | Jun 28, 2020 | Issued |
Array
(
[id] => 16544700
[patent_doc_number] => 20200411115
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-31
[patent_title] => BOOSTING READ SCHEME WITH BACK-GATE BIAS
[patent_app_type] => utility
[patent_app_number] => 16/909832
[patent_app_country] => US
[patent_app_date] => 2020-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15755
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16909832
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/909832 | Boosting read scheme with back-gate bias | Jun 22, 2020 | Issued |
Array
(
[id] => 17438725
[patent_doc_number] => 11264064
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-03-01
[patent_title] => Data driving circuit
[patent_app_type] => utility
[patent_app_number] => 16/902876
[patent_app_country] => US
[patent_app_date] => 2020-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 7328
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16902876
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/902876 | Data driving circuit | Jun 15, 2020 | Issued |
Array
(
[id] => 17606900
[patent_doc_number] => 11335392
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-17
[patent_title] => Memory devices including processing elements, and memory systems including memory devices
[patent_app_type] => utility
[patent_app_number] => 16/903055
[patent_app_country] => US
[patent_app_date] => 2020-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 9435
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16903055
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/903055 | Memory devices including processing elements, and memory systems including memory devices | Jun 15, 2020 | Issued |