Search

Muna A. Techane

Examiner (ID: 6002, Phone: (571)272-7856 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
804
Issued Applications
695
Pending Applications
83
Abandoned Applications
41

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16502265 [patent_doc_number] => 10867658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Address counting circuit, memory device and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/406849 [patent_app_country] => US [patent_app_date] => 2019-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11175 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16406849 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/406849
Address counting circuit, memory device and operating method thereof May 7, 2019 Issued
Array ( [id] => 15984241 [patent_doc_number] => 10672455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Method of self-testing and reusing of reference cells in a memory architecture [patent_app_type] => utility [patent_app_number] => 16/405701 [patent_app_country] => US [patent_app_date] => 2019-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4627 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16405701 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/405701
Method of self-testing and reusing of reference cells in a memory architecture May 6, 2019 Issued
Array ( [id] => 14676003 [patent_doc_number] => 20190237116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => STACK ACCESS CONTROL FOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/380285 [patent_app_country] => US [patent_app_date] => 2019-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16380285 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/380285
Stack access control for memory device Apr 9, 2019 Issued
Array ( [id] => 16293278 [patent_doc_number] => 10770131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => SRAM cell for interleaved wordline scheme [patent_app_type] => utility [patent_app_number] => 16/376198 [patent_app_country] => US [patent_app_date] => 2019-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7320 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16376198 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/376198
SRAM cell for interleaved wordline scheme Apr 4, 2019 Issued
Array ( [id] => 16347748 [patent_doc_number] => 20200312399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => PHASE CLOCK CORRECTION [patent_app_type] => utility [patent_app_number] => 16/371414 [patent_app_country] => US [patent_app_date] => 2019-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16371414 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/371414
Phase clock correction Mar 31, 2019 Issued
Array ( [id] => 16347733 [patent_doc_number] => 20200312384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => APPARATUSES AND METHODS FOR COMPENSATION OF SENSE AMPLIFIERS [patent_app_type] => utility [patent_app_number] => 16/372000 [patent_app_country] => US [patent_app_date] => 2019-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7568 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16372000 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/372000
Apparatuses and methods for compensation of sense amplifiers Mar 31, 2019 Issued
Array ( [id] => 14630889 [patent_doc_number] => 20190228813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => REFRESH COMMAND CONTROL FOR HOST ASSIST OF ROW HAMMER MITIGATION [patent_app_type] => utility [patent_app_number] => 16/370578 [patent_app_country] => US [patent_app_date] => 2019-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16370578 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/370578
Refresh command control for host assist of row hammer mitigation Mar 28, 2019 Issued
Array ( [id] => 16348352 [patent_doc_number] => 20200313003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => DEVICE, SYSTEM, AND METHOD TO CHANGE A CONSISTENCY OF BEHAVIOR BY A CELL CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/369856 [patent_app_country] => US [patent_app_date] => 2019-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16369856 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/369856
Device, system, and method to change a consistency of behavior by a cell circuit Mar 28, 2019 Issued
Array ( [id] => 14572955 [patent_doc_number] => 20190214085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => MEMRISTIVE DOT PRODUCT ENGINE FOR VECTOR PROCESSING [patent_app_type] => utility [patent_app_number] => 16/353451 [patent_app_country] => US [patent_app_date] => 2019-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16353451 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/353451
Memristive dot product engine for vector processing Mar 13, 2019 Issued
Array ( [id] => 16645325 [patent_doc_number] => 10923189 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 16/353172 [patent_app_country] => US [patent_app_date] => 2019-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5515 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16353172 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/353172
Memory device Mar 13, 2019 Issued
Array ( [id] => 16315860 [patent_doc_number] => 20200294598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => Routing Bad Block Flag for Reducing Routing Signals [patent_app_type] => utility [patent_app_number] => 16/352824 [patent_app_country] => US [patent_app_date] => 2019-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13762 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16352824 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/352824
Routing Bad Block Flag for Reducing Routing Signals Mar 13, 2019 Abandoned
Array ( [id] => 14537497 [patent_doc_number] => 20190204370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => METHOD AND SYSTEM AND COMPUTER PROGRAM FOR MEASURING ALTERNATING-CURRENT SYSTEM QUANTITIES [patent_app_type] => utility [patent_app_number] => 16/295246 [patent_app_country] => US [patent_app_date] => 2019-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4384 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16295246 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/295246
Method and system and computer program for measuring alternating-current system quantities Mar 6, 2019 Issued
Array ( [id] => 14508865 [patent_doc_number] => 20190198087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => MEMORY DEVICE FOR CONTROLLING REFRESH OPERATION BY USING CELL CHARACTERISTIC FLAGS [patent_app_type] => utility [patent_app_number] => 16/288626 [patent_app_country] => US [patent_app_date] => 2019-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12582 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16288626 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/288626
Memory device for controlling refresh operation by using cell characteristic flags Feb 27, 2019 Issued
Array ( [id] => 16272561 [patent_doc_number] => 20200274049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => USING A MAGNETIC JOSEPHSON JUNCTION DEVICE AS A PI INVERTER [patent_app_type] => utility [patent_app_number] => 16/285922 [patent_app_country] => US [patent_app_date] => 2019-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6570 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16285922 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/285922
Using a magnetic Josephson junction device as a pi inverter Feb 25, 2019 Issued
Array ( [id] => 16575317 [patent_doc_number] => 10897248 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-19 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/286428 [patent_app_country] => US [patent_app_date] => 2019-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 14840 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16286428 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/286428
Semiconductor device Feb 25, 2019 Issued
Array ( [id] => 16746246 [patent_doc_number] => 10971247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Semiconductor memory devices, memory systems, and methods of operating semiconductor memory devices [patent_app_type] => utility [patent_app_number] => 16/283650 [patent_app_country] => US [patent_app_date] => 2019-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 36 [patent_no_of_words] => 16486 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16283650 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/283650
Semiconductor memory devices, memory systems, and methods of operating semiconductor memory devices Feb 21, 2019 Issued
Array ( [id] => 16256523 [patent_doc_number] => 20200265898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => LOW NOISE BIT LINE CIRCUITS [patent_app_type] => utility [patent_app_number] => 16/278026 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16278026 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/278026
Low noise bit line circuits Feb 14, 2019 Issued
Array ( [id] => 16788966 [patent_doc_number] => 10991403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Memory calibration with end point replay [patent_app_type] => utility [patent_app_number] => 16/277804 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5540 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277804 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/277804
Memory calibration with end point replay Feb 14, 2019 Issued
Array ( [id] => 16668241 [patent_doc_number] => 10937494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-02 [patent_title] => Increasing current to memory devices while controlling leakage current [patent_app_type] => utility [patent_app_number] => 16/277988 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6707 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277988 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/277988
Increasing current to memory devices while controlling leakage current Feb 14, 2019 Issued
Array ( [id] => 17277653 [patent_doc_number] => 20210383851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => SPIN-ORBIT TORQUE MAGNETIZATION ROTATIONAL ELEMENT, SPIN-ORBIT TORQUE MAGNETORESISTIVE EFFECT ELEMENT, AND MAGNETIC MEMORY [patent_app_type] => utility [patent_app_number] => 17/288036 [patent_app_country] => US [patent_app_date] => 2019-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9790 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17288036 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/288036
Spin-orbit torque magnetization rotational element, spin-orbit torque magnetoresistive effect element, and magnetic memory Feb 5, 2019 Issued
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