Search

Muna A. Techane

Examiner (ID: 6002, Phone: (571)272-7856 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
804
Issued Applications
695
Pending Applications
83
Abandoned Applications
41

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13740155 [patent_doc_number] => 20180374547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => HANDLING OF THE THERMAL DISPARITY ACROSS MULTIPLE PACKAGES IN HIGH CAPACITY SSD [patent_app_type] => utility [patent_app_number] => 15/630646 [patent_app_country] => US [patent_app_date] => 2017-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4177 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15630646 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/630646
HANDLING OF THE THERMAL DISPARITY ACROSS MULTIPLE PACKAGES IN HIGH CAPACITY SSD Jun 21, 2017 Abandoned
Array ( [id] => 13737689 [patent_doc_number] => 20180373313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => NON-VOLATILE MEMORY SYSTEM OR SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 15/630330 [patent_app_country] => US [patent_app_date] => 2017-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -35 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15630330 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/630330
Non-volatile memory system or sub-system Jun 21, 2017 Issued
Array ( [id] => 13740107 [patent_doc_number] => 20180374523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => READ AND WRITE SCHEME FOR HIGH DENSITY SRAM [patent_app_type] => utility [patent_app_number] => 15/630466 [patent_app_country] => US [patent_app_date] => 2017-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2767 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15630466 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/630466
Read and write scheme for high density SRAM Jun 21, 2017 Issued
Array ( [id] => 15611073 [patent_doc_number] => 10586603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => Memory device and operating method thereof [patent_app_type] => utility [patent_app_number] => 15/628808 [patent_app_country] => US [patent_app_date] => 2017-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 8923 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15628808 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/628808
Memory device and operating method thereof Jun 20, 2017 Issued
Array ( [id] => 12573426 [patent_doc_number] => 10020066 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-10 [patent_title] => Systems and methods for sub-zero threshold characterization in a memory cell [patent_app_type] => utility [patent_app_number] => 15/626978 [patent_app_country] => US [patent_app_date] => 2017-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15626978 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/626978
Systems and methods for sub-zero threshold characterization in a memory cell Jun 18, 2017 Issued
Array ( [id] => 12848377 [patent_doc_number] => 20180174632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM [patent_app_type] => utility [patent_app_number] => 15/624458 [patent_app_country] => US [patent_app_date] => 2017-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7694 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15624458 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/624458
Semiconductor device and semiconductor system Jun 14, 2017 Issued
Array ( [id] => 12917335 [patent_doc_number] => 20180197621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-12 [patent_title] => E-FUSE CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/623694 [patent_app_country] => US [patent_app_date] => 2017-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4283 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15623694 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/623694
E-fuse circuit Jun 14, 2017 Issued
Array ( [id] => 12691864 [patent_doc_number] => 20180122454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => ADDRESS COUNTING CIRCUIT, MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/623448 [patent_app_country] => US [patent_app_date] => 2017-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11153 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15623448 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/623448
ADDRESS COUNTING CIRCUIT, MEMORY DEVICE AND OPERATING METHOD THEREOF Jun 14, 2017 Abandoned
Array ( [id] => 12435768 [patent_doc_number] => 09978438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-22 [patent_title] => Device having multiple switching buffers for data paths controlled based on IO configuration modes [patent_app_type] => utility [patent_app_number] => 15/614037 [patent_app_country] => US [patent_app_date] => 2017-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 11335 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15614037 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/614037
Device having multiple switching buffers for data paths controlled based on IO configuration modes Jun 4, 2017 Issued
Array ( [id] => 16200909 [patent_doc_number] => 10726076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Information acquisition method, and information acquisition device [patent_app_type] => utility [patent_app_number] => 15/590629 [patent_app_country] => US [patent_app_date] => 2017-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10645 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15590629 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/590629
Information acquisition method, and information acquisition device May 8, 2017 Issued
Array ( [id] => 11869278 [patent_doc_number] => 20170236563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'SENSE AMPLIFIER WITH OFFSET COMPENSATION' [patent_app_type] => utility [patent_app_number] => 15/585332 [patent_app_country] => US [patent_app_date] => 2017-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3854 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15585332 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/585332
Sense amplifier with offset compensation May 2, 2017 Issued
Array ( [id] => 16609066 [patent_doc_number] => 10910079 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-02 [patent_title] => Programming device arranged to obtain and store a random bit string in a memory device [patent_app_type] => utility [patent_app_number] => 16/099522 [patent_app_country] => US [patent_app_date] => 2017-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 14803 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16099522 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/099522
Programming device arranged to obtain and store a random bit string in a memory device Apr 27, 2017 Issued
Array ( [id] => 13451345 [patent_doc_number] => 20180277215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => STORAGE DEVICE AND ELECTRONIC APPARATUS USING THE SAME [patent_app_type] => utility [patent_app_number] => 15/466022 [patent_app_country] => US [patent_app_date] => 2017-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3364 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15466022 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/466022
STORAGE DEVICE AND ELECTRONIC APPARATUS USING THE SAME Mar 21, 2017 Abandoned
Array ( [id] => 11997246 [patent_doc_number] => 20170301401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-19 [patent_title] => 'MEMORY AND MEMORY CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 15/465700 [patent_app_country] => US [patent_app_date] => 2017-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14485 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15465700 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/465700
Memory and memory control method Mar 21, 2017 Issued
Array ( [id] => 12214692 [patent_doc_number] => 09911507 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Semiconductor device, semiconductor system including the same and test method thereof' [patent_app_type] => utility [patent_app_number] => 15/462358 [patent_app_country] => US [patent_app_date] => 2017-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 6296 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15462358 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/462358
Semiconductor device, semiconductor system including the same and test method thereof Mar 16, 2017 Issued
Array ( [id] => 11717975 [patent_doc_number] => 20170186475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'MEMORY DEVICE COMMAND RECEIVING AND DECODING METHODS' [patent_app_type] => utility [patent_app_number] => 15/456164 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5824 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456164 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/456164
Memory device command receiving and decoding methods Mar 9, 2017 Issued
Array ( [id] => 12595173 [patent_doc_number] => 20180090221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => BOOT-UP CONTROL CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/434990 [patent_app_country] => US [patent_app_date] => 2017-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5487 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15434990 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/434990
BOOT-UP CONTROL CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME Feb 15, 2017 Abandoned
Array ( [id] => 12778168 [patent_doc_number] => 20180151224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => RRAM-BASED AUTHENTICATION CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/435082 [patent_app_country] => US [patent_app_date] => 2017-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7482 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15435082 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/435082
RRAM-based authentication circuit Feb 15, 2017 Issued
Array ( [id] => 14768683 [patent_doc_number] => 10395742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-27 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/434346 [patent_app_country] => US [patent_app_date] => 2017-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 12541 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15434346 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/434346
Semiconductor device Feb 15, 2017 Issued
Array ( [id] => 11607812 [patent_doc_number] => 20170125115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND STORAGE DEVICE HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/403923 [patent_app_country] => US [patent_app_date] => 2017-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10846 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15403923 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/403923
Nonvolatile memory device and storage device having the same Jan 10, 2017 Issued
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