
Muna A. Techane
Examiner (ID: 6002, Phone: (571)272-7856 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2827 |
| Total Applications | 804 |
| Issued Applications | 695 |
| Pending Applications | 83 |
| Abandoned Applications | 41 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11861757
[patent_doc_number] => 09741445
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-08-22
[patent_title] => 'Cut layer programmable memory'
[patent_app_type] => utility
[patent_app_number] => 15/222532
[patent_app_country] => US
[patent_app_date] => 2016-07-28
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/222532 | Cut layer programmable memory | Jul 27, 2016 | Issued |
Array
(
[id] => 11571537
[patent_doc_number] => 20170110181
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-20
[patent_title] => 'SRAM CELL FOR INTERLEAVED WORDLINE SCHEME'
[patent_app_type] => utility
[patent_app_number] => 15/222914
[patent_app_country] => US
[patent_app_date] => 2016-07-28
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/222914 | SRAM cell for interleaved wordline scheme | Jul 27, 2016 | Issued |
Array
(
[id] => 12154501
[patent_doc_number] => 20180025766
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-01-25
[patent_title] => 'Integrated Memory Device and Method of Operating Same'
[patent_app_type] => utility
[patent_app_number] => 15/218336
[patent_app_country] => US
[patent_app_date] => 2016-07-25
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[patent_drawing_sheets_cnt] => 12
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/218336 | Integrated memory device and method of operating same | Jul 24, 2016 | Issued |
Array
(
[id] => 11539299
[patent_doc_number] => 09613713
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-04-04
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 15/195560
[patent_app_country] => US
[patent_app_date] => 2016-06-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/195560 | Semiconductor memory device | Jun 27, 2016 | Issued |
Array
(
[id] => 11753215
[patent_doc_number] => 09711233
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-18
[patent_title] => 'Systems and methods for sub-zero threshold characterization in a memory cell'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/195856 | Systems and methods for sub-zero threshold characterization in a memory cell | Jun 27, 2016 | Issued |
Array
(
[id] => 11876206
[patent_doc_number] => 09747987
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-08-29
[patent_title] => 'Endurance of silicon-oxide-nitride-oxide-silicon (SONOS) memory cells'
[patent_app_type] => utility
[patent_app_number] => 15/194201
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/194201 | Endurance of silicon-oxide-nitride-oxide-silicon (SONOS) memory cells | Jun 26, 2016 | Issued |
Array
(
[id] => 11096263
[patent_doc_number] => 20160293233
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-06
[patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 15/187000
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/187000 | Semiconductor memory apparatus | Jun 19, 2016 | Issued |
Array
(
[id] => 12101925
[patent_doc_number] => 09859023
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-01-02
[patent_title] => 'Memory test system and method of testing memory device'
[patent_app_type] => utility
[patent_app_number] => 15/176618
[patent_app_country] => US
[patent_app_date] => 2016-06-08
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/176618 | Memory test system and method of testing memory device | Jun 7, 2016 | Issued |
Array
(
[id] => 13121389
[patent_doc_number] => 10079049
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-09-18
[patent_title] => Stack access control for memory device
[patent_app_type] => utility
[patent_app_number] => 15/176442
[patent_app_country] => US
[patent_app_date] => 2016-06-08
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/176442 | Stack access control for memory device | Jun 7, 2016 | Issued |
Array
(
[id] => 11475253
[patent_doc_number] => 20170062035
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-02
[patent_title] => 'MEMORY DEVICE INCLUDING BOOSTED VOLTAGE GENERATOR'
[patent_app_type] => utility
[patent_app_number] => 15/176264
[patent_app_country] => US
[patent_app_date] => 2016-06-08
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/176264 | Memory device including boosted voltage generator | Jun 7, 2016 | Issued |
Array
(
[id] => 12095314
[patent_doc_number] => 20170352407
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-12-07
[patent_title] => 'SELF PRE-CHARGING MEMORY CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 15/175466
[patent_app_country] => US
[patent_app_date] => 2016-06-07
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/175466 | Self pre-charging memory circuits | Jun 6, 2016 | Issued |
Array
(
[id] => 12293487
[patent_doc_number] => 09934848
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-04-03
[patent_title] => Methods for determining the resistive states of resistive change elements
[patent_app_type] => utility
[patent_app_number] => 15/175234
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/175234 | Methods for determining the resistive states of resistive change elements | Jun 6, 2016 | Issued |
Array
(
[id] => 11739958
[patent_doc_number] => 09704545
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[patent_title] => 'Semiconductor memory device and a method of operating a bit line sense amplifier of the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/175550 | Semiconductor memory device and a method of operating a bit line sense amplifier of the same | Jun 6, 2016 | Issued |
Array
(
[id] => 12095320
[patent_doc_number] => 20170352413
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[patent_title] => 'DEVICES FOR DETERMINING THE RESISTIVE STATES OF RESISTIVE CHANGE ELEMENTS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/175346 | DEVICES FOR DETERMINING THE RESISTIVE STATES OF RESISTIVE CHANGE ELEMENTS | Jun 6, 2016 | Abandoned |
Array
(
[id] => 11279549
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[patent_issue_date] => 2016-11-15
[patent_title] => 'Resistive memory device implementing selective memory cell refresh'
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Array
(
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[patent_title] => 'FINE GRAIN LEVEL MEMORY POWER CONSUMPTION CONTROL MECHANISM'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/143500 | FINE GRAIN LEVEL MEMORY POWER CONSUMPTION CONTROL MECHANISM | Apr 28, 2016 | Abandoned |
Array
(
[id] => 12935329
[patent_doc_number] => 09830995
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[patent_issue_date] => 2017-11-28
[patent_title] => Circuit and method for biasing nonvolatile memory cells
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Array
(
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[patent_title] => Method for managing a fail row of the memory plane of a non volatile memory and corresponding memory device
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/099014 | Semiconductor device and driving method thereof | Apr 13, 2016 | Issued |