
Muna A. Techane
Examiner (ID: 6002, Phone: (571)272-7856 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2827 |
| Total Applications | 804 |
| Issued Applications | 695 |
| Pending Applications | 83 |
| Abandoned Applications | 41 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11770136
[patent_doc_number] => 09378821
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-06-28
[patent_title] => 'Endurance of silicon-oxide-nitride-oxide-silicon (SONOS) memory cells'
[patent_app_type] => utility
[patent_app_number] => 13/791758
[patent_app_country] => US
[patent_app_date] => 2013-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7920
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13791758
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/791758 | Endurance of silicon-oxide-nitride-oxide-silicon (SONOS) memory cells | Mar 7, 2013 | Issued |
Array
(
[id] => 9718535
[patent_doc_number] => 20140254233
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-11
[patent_title] => 'Redundant Fuse Coding'
[patent_app_type] => utility
[patent_app_number] => 13/788009
[patent_app_country] => US
[patent_app_date] => 2013-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6229
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788009
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/788009 | Redundant fuse coding | Mar 6, 2013 | Issued |
Array
(
[id] => 10631298
[patent_doc_number] => 09349452
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-24
[patent_title] => 'Hybrid non-volatile memory cells for shared bit line'
[patent_app_type] => utility
[patent_app_number] => 13/788183
[patent_app_country] => US
[patent_app_date] => 2013-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 29
[patent_no_of_words] => 10965
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788183
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/788183 | Hybrid non-volatile memory cells for shared bit line | Mar 6, 2013 | Issued |
Array
(
[id] => 9447933
[patent_doc_number] => 20140119102
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-01
[patent_title] => 'DUMMY READ TO PREVENT CROWBAR CURRENT DURING READ-WRITE COLLISIONS IN MEMORY ARRAYS WITH CROSSCOUPLED KEEPERS'
[patent_app_type] => utility
[patent_app_number] => 13/787875
[patent_app_country] => US
[patent_app_date] => 2013-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6041
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13787875
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/787875 | Dummy read to prevent crowbar current during read-write collisions in memory arrays with crosscoupled keepers | Mar 6, 2013 | Issued |
Array
(
[id] => 9718601
[patent_doc_number] => 20140254299
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-11
[patent_title] => 'ROBUST MEMORY START-UP USING CLOCK COUNTER'
[patent_app_type] => utility
[patent_app_number] => 13/789017
[patent_app_country] => US
[patent_app_date] => 2013-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 9067
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13789017
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/789017 | Robust memory start-up using clock counter | Mar 6, 2013 | Issued |
Array
(
[id] => 11775893
[patent_doc_number] => 09384839
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-07-05
[patent_title] => 'Write sequence providing write abort protection'
[patent_app_type] => utility
[patent_app_number] => 13/788415
[patent_app_country] => US
[patent_app_date] => 2013-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 20
[patent_no_of_words] => 7489
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788415
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/788415 | Write sequence providing write abort protection | Mar 6, 2013 | Issued |
Array
(
[id] => 9067033
[patent_doc_number] => 20130258789
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-03
[patent_title] => 'SEMICONDUCTOR MEMORY AND METHOD OF OPERATING SEMICONDUCTOR MEMORY'
[patent_app_type] => utility
[patent_app_number] => 13/789059
[patent_app_country] => US
[patent_app_date] => 2013-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 11280
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13789059
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/789059 | Semiconductor memory and method of operating semiconductor memory | Mar 6, 2013 | Issued |
Array
(
[id] => 9718539
[patent_doc_number] => 20140254237
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-11
[patent_title] => 'Method for Operating RRAM Memory'
[patent_app_type] => utility
[patent_app_number] => 13/788063
[patent_app_country] => US
[patent_app_date] => 2013-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2494
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788063
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/788063 | Method for operating RRAM memory | Mar 6, 2013 | Issued |
Array
(
[id] => 9040002
[patent_doc_number] => 20130242640
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-19
[patent_title] => 'Methods and Systems for Resistive Change Memory Cell Restoration'
[patent_app_type] => utility
[patent_app_number] => 13/789557
[patent_app_country] => US
[patent_app_date] => 2013-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8937
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13789557
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/789557 | Methods and Systems for Resistive Change Memory Cell Restoration | Mar 6, 2013 | Abandoned |
Array
(
[id] => 9052943
[patent_doc_number] => 20130250657
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-26
[patent_title] => 'System and Method for Writing Data to an RRAM Cell'
[patent_app_type] => utility
[patent_app_number] => 13/789543
[patent_app_country] => US
[patent_app_date] => 2013-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 15598
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13789543
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/789543 | System and Method for Writing Data to an RRAM Cell | Mar 6, 2013 | Abandoned |
Array
(
[id] => 9033039
[patent_doc_number] => 20130235677
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-12
[patent_title] => 'CIRCUIT FOR PARALLEL BIT TEST OF SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/788137
[patent_app_country] => US
[patent_app_date] => 2013-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 8352
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788137
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/788137 | CIRCUIT FOR PARALLEL BIT TEST OF SEMICONDUCTOR MEMORY DEVICE | Mar 6, 2013 | Abandoned |
Array
(
[id] => 9033047
[patent_doc_number] => 20130235685
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-12
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF SCREENING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/788453
[patent_app_country] => US
[patent_app_date] => 2013-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6838
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13788453
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/788453 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF SCREENING THE SAME | Mar 6, 2013 | Abandoned |
Array
(
[id] => 9718533
[patent_doc_number] => 20140254232
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-11
[patent_title] => 'INTEGRATED CIRCUIT DEVICES HAVING MEMORY AND METHODS OF IMPLEMENTING MEMORY IN AN INTEGRATED CIRCUIT DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/789313
[patent_app_country] => US
[patent_app_date] => 2013-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8033
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13789313
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/789313 | Integrated circuit devices having memory and methods of implementing memory in an integrated circuit device | Mar 6, 2013 | Issued |
Array
(
[id] => 16520299
[patent_doc_number] => 10871513
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-22
[patent_title] => Differential protection method in an electrical power supply system and protective apparatus for carrying out a differential protection method
[patent_app_type] => utility
[patent_app_number] => 14/646780
[patent_app_country] => US
[patent_app_date] => 2012-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4635
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14646780
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/646780 | Differential protection method in an electrical power supply system and protective apparatus for carrying out a differential protection method | Nov 25, 2012 | Issued |
Array
(
[id] => 10171832
[patent_doc_number] => 09202544
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-01
[patent_title] => 'Multi-bit magnetic memory cell'
[patent_app_type] => utility
[patent_app_number] => 14/235133
[patent_app_country] => US
[patent_app_date] => 2012-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 18
[patent_no_of_words] => 9286
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14235133
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/235133 | Multi-bit magnetic memory cell | Jul 18, 2012 | Issued |
Array
(
[id] => 8337248
[patent_doc_number] => 20120203954
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-09
[patent_title] => 'DATA STORAGE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/256158
[patent_app_country] => US
[patent_app_date] => 2010-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 3256
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13256158
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/256158 | DATA STORAGE DEVICE | Jul 29, 2010 | Abandoned |