Muna A. Techane

Array ( [id] => 20215981 [patent_doc_number] => 12412635 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Apparatus and method for performing self-calibration of receiver offset without shorting differential input terminals of receiver [patent_app_type] => utility [patent_app_number] => 18/540879 [patent_app_country] => US [patent_app_date] => 2023-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2273 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 398 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18540879 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20053399 [patent_doc_number] => 20250191621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => PAGE BUFFER CIRCUIT AND OPERATING METHOD THEREOF ADAPTED FOR PAGE READ DEVICE [patent_app_type] => utility [patent_app_number] => 18/534840 [patent_app_country] => US [patent_app_date] => 2023-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2119 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18534840 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19654260 [patent_doc_number] => 12176060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Open translation unit management using an adaptive read threshold [patent_app_type] => utility [patent_app_number] => 18/531003 [patent_app_country] => US [patent_app_date] => 2023-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8476 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531003 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19070824 [patent_doc_number] => 20240105250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/529673 [patent_app_country] => US [patent_app_date] => 2023-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11186 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18529673 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19500128 [patent_doc_number] => 20240339146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => MEMORY DEVICE FOR PERFORMING TARGET REFRESH OPERATION, MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/527371 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11724 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19823243 [patent_doc_number] => 20250081450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => HIGH-SPEED MULTI-WRITE READ ONLY MEMORY ARRAY [patent_app_type] => utility [patent_app_number] => 18/519320 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8857 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -56 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519320 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19806061 [patent_doc_number] => 20250071986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => ONE-TIME-PROGRAMMABLE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/518809 [patent_app_country] => US [patent_app_date] => 2023-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18456 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518809 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19175885 [patent_doc_number] => 20240161859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => APPARATUSES AND METHODS FOR SEPARATE WRITE ENABLE FOR SINGLE-PASS ACCESS OF DATA, METADATA, AND PARITY INFORMATION [patent_app_type] => utility [patent_app_number] => 18/504353 [patent_app_country] => US [patent_app_date] => 2023-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14962 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18504353 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19720123 [patent_doc_number] => 12205666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Pipe latch circuit, operating method thereof, and semiconductor memory device including the same [patent_app_type] => utility [patent_app_number] => 18/501432 [patent_app_country] => US [patent_app_date] => 2023-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6637 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18501432 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19205863 [patent_doc_number] => 20240177762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => SELECTABLE MEMORY SYSTEM ERASE FUNCTION [patent_app_type] => utility [patent_app_number] => 18/501873 [patent_app_country] => US [patent_app_date] => 2023-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16372 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18501873 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19596801 [patent_doc_number] => 12154654 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Dynamic random access memory speed bin compatibility [patent_app_type] => utility [patent_app_number] => 18/386518 [patent_app_country] => US [patent_app_date] => 2023-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 15663 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18386518 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19781318 [patent_doc_number] => 12230356 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Memory device, memory system, and operating method of memory system [patent_app_type] => utility [patent_app_number] => 18/384973 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 16186 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18384973 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19459973 [patent_doc_number] => 12100475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Apparatus, memory controller, memory device, memory system, and method for clock switching and low power consumption [patent_app_type] => utility [patent_app_number] => 18/496693 [patent_app_country] => US [patent_app_date] => 2023-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 18270 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18496693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20175705 [patent_doc_number] => 12394458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Memory clock control circuit and method for controlling memory clock [patent_app_type] => utility [patent_app_number] => 18/382565 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 0 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18382565 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20229139 [patent_doc_number] => 12417793 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 18/491849 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 32 [patent_no_of_words] => 7434 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18491849 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19993745 [patent_doc_number] => 20250131967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => MEMORY DEVICE AND METHOD FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/490234 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4316 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490234 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19943420 [patent_doc_number] => 12315556 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Semiconductor device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/380876 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 1088 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18380876 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19893071 [patent_doc_number] => 20250118383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => ONE-TIME PROGRAMMABLE MEMORY DEVICES WITH HEATER DEVICES AND METHODS FOR MANUFACTURING AND OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/483745 [patent_app_country] => US [patent_app_date] => 2023-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12042 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18483745 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19696115 [patent_doc_number] => 20250014660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => SMALL-AREA COMMON-VOLTAGE ANTI-FUSE ARRAY [patent_app_type] => utility [patent_app_number] => 18/480743 [patent_app_country] => US [patent_app_date] => 2023-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6476 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18480743 [rel_patent_id] =>[rel_patent_doc_number] =>)