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Mushfique Siddique

Examiner (ID: 1672, Phone: (571)270-0424 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2825
Total Applications
886
Issued Applications
722
Pending Applications
91
Abandoned Applications
88

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19893042 [patent_doc_number] => 20250118354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY CHIP BONDED TO A CMOS CHIP INCLUDING A PERIPHERAL CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/984017 [patent_app_country] => US [patent_app_date] => 2024-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17080 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18984017 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/984017
SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY CHIP BONDED TO A CMOS CHIP INCLUDING A PERIPHERAL CIRCUIT Dec 16, 2024 Pending
Array ( [id] => 19865967 [patent_doc_number] => 20250104753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => SRAM WITH TRACKING CIRCUITRY FOR REDUCING ACTIVE POWER [patent_app_type] => utility [patent_app_number] => 18/975894 [patent_app_country] => US [patent_app_date] => 2024-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18975894 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/975894
SRAM WITH TRACKING CIRCUITRY FOR REDUCING ACTIVE POWER Dec 9, 2024 Pending
Array ( [id] => 20153154 [patent_doc_number] => 20250252992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => RECEIVING CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/975461 [patent_app_country] => US [patent_app_date] => 2024-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4235 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18975461 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/975461
RECEIVING CIRCUIT Dec 9, 2024 Pending
Array ( [id] => 20034871 [patent_doc_number] => 20250173093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => WRITE BROADCAST OPERATIONS ASSOCIATED WITH A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/967242 [patent_app_country] => US [patent_app_date] => 2024-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38731 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18967242 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/967242
WRITE BROADCAST OPERATIONS ASSOCIATED WITH A MEMORY DEVICE Dec 2, 2024 Pending
Array ( [id] => 20034850 [patent_doc_number] => 20250173072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => PROCESSING-IN-MEMORY DEVICE BASED ON RESISTIVE MEMORY AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/961689 [patent_app_country] => US [patent_app_date] => 2024-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18961689 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/961689
PROCESSING-IN-MEMORY DEVICE BASED ON RESISTIVE MEMORY AND METHOD THEREOF Nov 26, 2024 Pending
Array ( [id] => 19835488 [patent_doc_number] => 20250087274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/960230 [patent_app_country] => US [patent_app_date] => 2024-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18960230 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/960230
SEMICONDUCTOR STORAGE DEVICE Nov 25, 2024 Pending
Array ( [id] => 19835492 [patent_doc_number] => 20250087278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => ELIMINATING WRITE DISTURB FOR SYSTEM METADATA IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 18/958121 [patent_app_country] => US [patent_app_date] => 2024-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8820 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18958121 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/958121
ELIMINATING WRITE DISTURB FOR SYSTEM METADATA IN A MEMORY SUB-SYSTEM Nov 24, 2024 Pending
Array ( [id] => 20139209 [patent_doc_number] => 20250246253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => MEMORY DEVICE, INTEGRATED CIRCUIT AND OPERATING METHOD OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/951548 [patent_app_country] => US [patent_app_date] => 2024-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 948 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18951548 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/951548
MEMORY DEVICE, INTEGRATED CIRCUIT AND OPERATING METHOD OF MEMORY DEVICE Nov 17, 2024 Pending
Array ( [id] => 20019334 [patent_doc_number] => 20250157556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => NEUROMORPHIC SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/945134 [patent_app_country] => US [patent_app_date] => 2024-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18945134 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/945134
NEUROMORPHIC SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF Nov 11, 2024 Pending
Array ( [id] => 20028492 [patent_doc_number] => 20250166714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => SEMICONDUCTOR DEVICE, OPERATION METHOD THEREOF, AND STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 18/935729 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2372 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18935729 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/935729
SEMICONDUCTOR DEVICE, OPERATION METHOD THEREOF, AND STORAGE SYSTEM Nov 3, 2024 Pending
Array ( [id] => 19757813 [patent_doc_number] => 20250046378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => MIXED WRITE CURSOR FOR BLOCK STRIPE WRITING [patent_app_type] => utility [patent_app_number] => 18/925775 [patent_app_country] => US [patent_app_date] => 2024-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14336 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18925775 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/925775
MIXED WRITE CURSOR FOR BLOCK STRIPE WRITING Oct 23, 2024 Pending
Array ( [id] => 20019305 [patent_doc_number] => 20250157527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => APPARATUS WITH MULTI-MODE-REGISTER READ AND WRITE COMMANDS [patent_app_type] => utility [patent_app_number] => 18/923597 [patent_app_country] => US [patent_app_date] => 2024-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18923597 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/923597
APPARATUS WITH MULTI-MODE-REGISTER READ AND WRITE COMMANDS Oct 21, 2024 Pending
Array ( [id] => 19757798 [patent_doc_number] => 20250046363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => SIGNAL PROCESSING CIRCUIT AND MEMORY [patent_app_type] => utility [patent_app_number] => 18/923604 [patent_app_country] => US [patent_app_date] => 2024-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18923604 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/923604
SIGNAL PROCESSING CIRCUIT AND MEMORY Oct 21, 2024 Pending
Array ( [id] => 20660382 [patent_doc_number] => 20260112433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-23 [patent_title] => VOLTAGE PROVISION CIRCUITS WITH VOLTAGE DETECTOR AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/921340 [patent_app_country] => US [patent_app_date] => 2024-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18921340 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/921340
VOLTAGE PROVISION CIRCUITS WITH VOLTAGE DETECTOR AND METHODS FOR OPERATING THE SAME Oct 20, 2024 Pending
Array ( [id] => 19726914 [patent_doc_number] => 20250029665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => ADAPTIVE PROGRAMMING DELAY SCHEME IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 18/906579 [patent_app_country] => US [patent_app_date] => 2024-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17032 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18906579 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/906579
ADAPTIVE PROGRAMMING DELAY SCHEME IN A MEMORY SUB-SYSTEM Oct 3, 2024 Pending
Array ( [id] => 20617973 [patent_doc_number] => 20260088076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-26 [patent_title] => ADJUSTING TRAINING DELAYS IN SDRAM [patent_app_type] => utility [patent_app_number] => 18/898466 [patent_app_country] => US [patent_app_date] => 2024-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18898466 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/898466
ADJUSTING TRAINING DELAYS IN SDRAM Sep 25, 2024 Pending
Array ( [id] => 19696122 [patent_doc_number] => 20250014667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => MEMORY CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/894510 [patent_app_country] => US [patent_app_date] => 2024-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5989 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18894510 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/894510
MEMORY CIRCUIT Sep 23, 2024 Pending
Array ( [id] => 20063088 [patent_doc_number] => 20250201310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/889171 [patent_app_country] => US [patent_app_date] => 2024-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12593 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18889171 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/889171
THREE-DIMENSIONAL MEMORY DEVICE Sep 17, 2024 Pending
Array ( [id] => 20601504 [patent_doc_number] => 20260079513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-19 [patent_title] => VOLTAGE REGULATOR [patent_app_type] => utility [patent_app_number] => 18/885082 [patent_app_country] => US [patent_app_date] => 2024-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1198 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18885082 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/885082
VOLTAGE REGULATOR Sep 12, 2024 Pending
Array ( [id] => 20588366 [patent_doc_number] => 20260073962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-12 [patent_title] => MEMORY CELL ARRANGEMENT AND METHOD OF READING A CAPACITIVE MEMORY CELL [patent_app_type] => utility [patent_app_number] => 18/830663 [patent_app_country] => US [patent_app_date] => 2024-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5822 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18830663 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/830663
MEMORY CELL ARRANGEMENT AND METHOD OF READING A CAPACITIVE MEMORY CELL Sep 10, 2024 Pending
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