Mushfique Siddique

Array ( [id] => 11094099 [patent_doc_number] => 20160291067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'APPARATUS AND METHOD FOR FINE-GRAINED WEATHER NORMALIZATION OF ENERGY CONSUMPTION BASELINE DATA' [patent_app_type] => utility [patent_app_number] => 14/673995 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11847 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14673995 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12534180 [patent_doc_number] => 10008250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Single level cell write buffering for multiple level cell non-volatile memory [patent_app_type] => utility [patent_app_number] => 14/671493 [patent_app_country] => US [patent_app_date] => 2015-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7346 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14671493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10440266 [patent_doc_number] => 20150325278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-12 [patent_title] => 'VOLTAGE-CONTROLLED SOLID-STATE MAGNETIC DEVICES' [patent_app_type] => utility [patent_app_number] => 14/659059 [patent_app_country] => US [patent_app_date] => 2015-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 25656 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14659059 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10732759 [patent_doc_number] => 20160078910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/657297 [patent_app_country] => US [patent_app_date] => 2015-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3945 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14657297 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12249911 [patent_doc_number] => 09922692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-20 [patent_title] => 'Semiconductor device including refresh circuit for memory cell' [patent_app_type] => utility [patent_app_number] => 14/645049 [patent_app_country] => US [patent_app_date] => 2015-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 30 [patent_no_of_words] => 19690 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 351 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14645049 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13256729 [patent_doc_number] => 10141058 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-11-27 [patent_title] => Multi-chip non-volatile semiconductor memory package including heater and sensor elements [patent_app_type] => utility [patent_app_number] => 14/639301 [patent_app_country] => US [patent_app_date] => 2015-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 8919 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14639301 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12256777 [patent_doc_number] => 09928925 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-27 [patent_title] => 'Multi-chip non-volatile semiconductor memory package including heater and sensor elements' [patent_app_type] => utility [patent_app_number] => 14/639313 [patent_app_country] => US [patent_app_date] => 2015-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 9202 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14639313 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11028501 [patent_doc_number] => 20160225457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'MEMORY DEVICE AND METHOD OF READING DATA' [patent_app_type] => utility [patent_app_number] => 14/635329 [patent_app_country] => US [patent_app_date] => 2015-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 14614 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14635329 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11043275 [patent_doc_number] => 20160240231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'SHARED GATE FED SENSE AMPLIFIER' [patent_app_type] => utility [patent_app_number] => 14/624605 [patent_app_country] => US [patent_app_date] => 2015-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5560 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14624605 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10764990 [patent_doc_number] => 20160111145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-21 [patent_title] => '6T SRAM CELL' [patent_app_type] => utility [patent_app_number] => 14/624847 [patent_app_country] => US [patent_app_date] => 2015-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3218 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14624847 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11028489 [patent_doc_number] => 20160225445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'WRITING METHOD AND READING METHOD OF PHASE CHANGE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/609595 [patent_app_country] => US [patent_app_date] => 2015-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3350 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14609595 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11489270 [patent_doc_number] => 09595342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'Method and apparatus for refresh programming of memory cells based on amount of threshold voltage downshift' [patent_app_type] => utility [patent_app_number] => 14/600365 [patent_app_country] => US [patent_app_date] => 2015-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 59 [patent_no_of_words] => 23525 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 335 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14600365 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10992828 [patent_doc_number] => 20160189774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'REFRESH LOGIC TO REFRESH ONLY MEMORY CELLS HAVING A FIRST VALUE' [patent_app_type] => utility [patent_app_number] => 14/583547 [patent_app_country] => US [patent_app_date] => 2014-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4927 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14583547 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10788136 [patent_doc_number] => 20160134292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'SAMPLING CIRCUIT MODULE, MEMORY CONTROL CIRCUIT UNIT, AND DATA SAMPLING METHOD' [patent_app_type] => utility [patent_app_number] => 14/578471 [patent_app_country] => US [patent_app_date] => 2014-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8414 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14578471 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10290169 [patent_doc_number] => 20150175167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'COURSE ESTIMATOR' [patent_app_type] => utility [patent_app_number] => 14/576884 [patent_app_country] => US [patent_app_date] => 2014-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5618 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14576884 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10290167 [patent_doc_number] => 20150175166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'COURSE ESTIMATOR' [patent_app_type] => utility [patent_app_number] => 14/575006 [patent_app_country] => US [patent_app_date] => 2014-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6271 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14575006 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10440290 [patent_doc_number] => 20150325301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-12 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND ERASING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/574079 [patent_app_country] => US [patent_app_date] => 2014-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 16607 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14574079 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10294279 [patent_doc_number] => 20150179278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'DATA STORAGE CELL AND MEMORY ARRANGEMENT' [patent_app_type] => utility [patent_app_number] => 14/558505 [patent_app_country] => US [patent_app_date] => 2014-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7994 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14558505 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10447725 [patent_doc_number] => 20150332738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND METHOD FOR OPERATING THE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/543475 [patent_app_country] => US [patent_app_date] => 2014-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9068 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14543475 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10779780 [patent_doc_number] => 20160125936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-05 [patent_title] => 'PHASE CHANGE MEMORY WITH METASTABLE SET AND RESET STATES' [patent_app_type] => utility [patent_app_number] => 14/533495 [patent_app_country] => US [patent_app_date] => 2014-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1969 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14533495 [rel_patent_id] =>[rel_patent_doc_number] =>)