Search

Mushfique Siddique

Examiner (ID: 9751, Phone: (571)270-0424 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2825
Total Applications
860
Issued Applications
708
Pending Applications
82
Abandoned Applications
86

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18366427 [patent_doc_number] => 20230148018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => READ-TIME OVERHEAD AND POWER OPTIMIZATIONS WITH COMMAND QUEUES IN MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/095646 [patent_app_country] => US [patent_app_date] => 2023-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12922 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18095646 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/095646
Read-time overhead and power optimizations with command queues in memory device Jan 10, 2023 Issued
Array ( [id] => 19906290 [patent_doc_number] => 12283302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Memory circuit, signal transmission system and signal transmission method [patent_app_type] => utility [patent_app_number] => 18/151459 [patent_app_country] => US [patent_app_date] => 2023-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 0 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18151459 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/151459
Memory circuit, signal transmission system and signal transmission method Jan 7, 2023 Issued
Array ( [id] => 18454802 [patent_doc_number] => 20230196082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => BAYESIAN NEURAL NETWORK WITH RESISTIVE MEMORY HARDWARE ACCELERATOR AND METHOD FOR PROGRAMMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/067088 [patent_app_country] => US [patent_app_date] => 2022-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6522 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18067088 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/067088
BAYESIAN NEURAL NETWORK WITH RESISTIVE MEMORY HARDWARE ACCELERATOR AND METHOD FOR PROGRAMMING THE SAME Dec 15, 2022 Pending
Array ( [id] => 19330435 [patent_doc_number] => 12048135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Four-poly-pitch SRAM cell with backside metal tracks [patent_app_type] => utility [patent_app_number] => 18/064859 [patent_app_country] => US [patent_app_date] => 2022-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8349 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18064859 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/064859
Four-poly-pitch SRAM cell with backside metal tracks Dec 11, 2022 Issued
Array ( [id] => 19062894 [patent_doc_number] => 11942139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Performing refresh operations on memory cells [patent_app_type] => utility [patent_app_number] => 18/075570 [patent_app_country] => US [patent_app_date] => 2022-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6760 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18075570 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/075570
Performing refresh operations on memory cells Dec 5, 2022 Issued
Array ( [id] => 20495174 [patent_doc_number] => 12537050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => Memory device and sense amplifier control circuit for offset cancellation [patent_app_type] => utility [patent_app_number] => 18/061827 [patent_app_country] => US [patent_app_date] => 2022-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 3803 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18061827 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/061827
Memory device and sense amplifier control circuit for offset cancellation Dec 4, 2022 Issued
Array ( [id] => 18268874 [patent_doc_number] => 20230090116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => MEMORY DEVICE CAPABLE OF ADJUSTING CLOCK SIGNAL BASED ON OPERATING SPEED AND PROPAGATION DELAY OF COMMAND/ADDRESS SIGNAL [patent_app_type] => utility [patent_app_number] => 17/992651 [patent_app_country] => US [patent_app_date] => 2022-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17992651 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/992651
Memory device capable of adjusting clock signal based on operating speed and propagation delay of command/address signal Nov 21, 2022 Issued
Array ( [id] => 18238076 [patent_doc_number] => 20230070387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => RESISTIVE RANDOM-ACCESS MEMORY FOR EXCLUSIVE NOR (XNOR) NEURAL NETWORKS [patent_app_type] => utility [patent_app_number] => 17/986652 [patent_app_country] => US [patent_app_date] => 2022-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6569 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17986652 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/986652
RESISTIVE RANDOM-ACCESS MEMORY FOR EXCLUSIVE NOR (XNOR) NEURAL NETWORKS Nov 13, 2022 Abandoned
Array ( [id] => 20080568 [patent_doc_number] => 12354643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Storage device and storage system including PUF [patent_app_type] => utility [patent_app_number] => 17/986556 [patent_app_country] => US [patent_app_date] => 2022-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3785 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17986556 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/986556
Storage device and storage system including PUF Nov 13, 2022 Issued
Array ( [id] => 19796061 [patent_doc_number] => 12237026 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-02-25 [patent_title] => Systems and methods for a compressed bitcell read-only memory [patent_app_type] => utility [patent_app_number] => 17/982382 [patent_app_country] => US [patent_app_date] => 2022-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4694 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17982382 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/982382
Systems and methods for a compressed bitcell read-only memory Nov 6, 2022 Issued
Array ( [id] => 18593109 [patent_doc_number] => 11742018 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Signal generator for generating control signals for page buffer of memory device [patent_app_type] => utility [patent_app_number] => 17/979591 [patent_app_country] => US [patent_app_date] => 2022-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 6454 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17979591 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/979591
Signal generator for generating control signals for page buffer of memory device Nov 1, 2022 Issued
Array ( [id] => 19957162 [patent_doc_number] => 12327578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-10 [patent_title] => Magnetic domain wall-based memory device with track-crossing architecture [patent_app_type] => utility [patent_app_number] => 18/051719 [patent_app_country] => US [patent_app_date] => 2022-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 981 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18051719 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/051719
Magnetic domain wall-based memory device with track-crossing architecture Oct 31, 2022 Issued
Array ( [id] => 18193298 [patent_doc_number] => 20230046817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => APPARATUS AND METHOD WITH IN-MEMORY DELAY DEPENDENT PROCESSING [patent_app_type] => utility [patent_app_number] => 17/974852 [patent_app_country] => US [patent_app_date] => 2022-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17974852 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/974852
Apparatus and method with in-memory delay dependent processing Oct 26, 2022 Issued
Array ( [id] => 19016067 [patent_doc_number] => 11923007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Dirty write on power off [patent_app_type] => utility [patent_app_number] => 18/049855 [patent_app_country] => US [patent_app_date] => 2022-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 14244 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18049855 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/049855
Dirty write on power off Oct 25, 2022 Issued
Array ( [id] => 18179370 [patent_doc_number] => 20230040099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => STABILIZATION OF SELECTOR DEVICES IN A MEMORY ARRAY [patent_app_type] => utility [patent_app_number] => 17/971340 [patent_app_country] => US [patent_app_date] => 2022-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17971340 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/971340
Stabilization of selector devices in a memory array Oct 20, 2022 Issued
Array ( [id] => 19906292 [patent_doc_number] => 12283304 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Memory system and apparatus for evicting cold data from volatile memory and storing the evicted cold data into the non-volatile memory [patent_app_type] => utility [patent_app_number] => 17/970103 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6984 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17970103 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/970103
Memory system and apparatus for evicting cold data from volatile memory and storing the evicted cold data into the non-volatile memory Oct 19, 2022 Issued
Array ( [id] => 19979121 [patent_doc_number] => 12346596 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Semiconductor memory device for performing program operation and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/970212 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 1231 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17970212 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/970212
Semiconductor memory device for performing program operation and method of operating the same Oct 19, 2022 Issued
Array ( [id] => 19796035 [patent_doc_number] => 12237000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Sense amplifier circuit with precharge, memory device including the same and sensing method of memory device [patent_app_type] => utility [patent_app_number] => 18/045846 [patent_app_country] => US [patent_app_date] => 2022-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 8071 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18045846 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/045846
Sense amplifier circuit with precharge, memory device including the same and sensing method of memory device Oct 11, 2022 Issued
Array ( [id] => 19925014 [patent_doc_number] => 12299296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Semiconductor memory device and method of adjusting operation condition of the same [patent_app_type] => utility [patent_app_number] => 18/045590 [patent_app_country] => US [patent_app_date] => 2022-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 33 [patent_no_of_words] => 9990 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18045590 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/045590
Semiconductor memory device and method of adjusting operation condition of the same Oct 10, 2022 Issued
Array ( [id] => 19137825 [patent_doc_number] => 11972796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Resistive random access memory device with three-dimensional cross-point structure and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/960660 [patent_app_country] => US [patent_app_date] => 2022-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 25 [patent_no_of_words] => 7473 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960660 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960660
Resistive random access memory device with three-dimensional cross-point structure and method of operating the same Oct 4, 2022 Issued
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