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Examiner (ID: 9286)

Most Active Art Unit
2816
Art Unit(s)
2816, 2504, 3992
Total Applications
1495
Issued Applications
1343
Pending Applications
84
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 643165 [patent_doc_number] => 07123060 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-10-17 [patent_title] => 'Drive circuit for a switching element' [patent_app_type] => utility [patent_app_number] => 10/907397 [patent_app_country] => US [patent_app_date] => 2005-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3592 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/123/07123060.pdf [firstpage_image] =>[orig_patent_app_number] => 10907397 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/907397
Drive circuit for a switching element Mar 30, 2005 Issued
Array ( [id] => 7016946 [patent_doc_number] => 20050218964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'Active diode' [patent_app_type] => utility [patent_app_number] => 11/094369 [patent_app_country] => US [patent_app_date] => 2005-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5796 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20050218964.pdf [firstpage_image] =>[orig_patent_app_number] => 11094369 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/094369
Active diode Mar 30, 2005 Issued
90/007452 UNIVERSAL LIGHTING NETWORK METHODS AND SYSTEMS Mar 6, 2005 Issued
Array ( [id] => 7073102 [patent_doc_number] => 20050146368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-07 [patent_title] => 'Adaptive delay of timing control signals' [patent_app_type] => utility [patent_app_number] => 11/066385 [patent_app_country] => US [patent_app_date] => 2005-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4614 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20050146368.pdf [firstpage_image] =>[orig_patent_app_number] => 11066385 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/066385
Adaptive delay of timing control signals Feb 27, 2005 Issued
Array ( [id] => 5653345 [patent_doc_number] => 20060139080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Data strobe signal generating circuit and data strobe signal generating method' [patent_app_type] => utility [patent_app_number] => 11/066010 [patent_app_country] => US [patent_app_date] => 2005-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3942 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20060139080.pdf [firstpage_image] =>[orig_patent_app_number] => 11066010 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/066010
Data strobe signal generating circuit and data strobe signal generating method Feb 23, 2005 Issued
Array ( [id] => 7048874 [patent_doc_number] => 20050184761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-25 [patent_title] => 'Comparator circuit' [patent_app_type] => utility [patent_app_number] => 11/059389 [patent_app_country] => US [patent_app_date] => 2005-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5141 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20050184761.pdf [firstpage_image] =>[orig_patent_app_number] => 11059389 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/059389
Comparator circuit Feb 16, 2005 Issued
Array ( [id] => 7239242 [patent_doc_number] => 20050140410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Circuit for modifying a clock signal to achieve a predetermined duty cycle' [patent_app_type] => utility [patent_app_number] => 11/060842 [patent_app_country] => US [patent_app_date] => 2005-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4763 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20050140410.pdf [firstpage_image] =>[orig_patent_app_number] => 11060842 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/060842
Circuit for modifying a clock signal to achieve a predetermined duty cycle Feb 16, 2005 Abandoned
Array ( [id] => 496921 [patent_doc_number] => 07212064 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-01 [patent_title] => 'Methods and systems for measuring temperature using digital signals' [patent_app_type] => utility [patent_app_number] => 11/056549 [patent_app_country] => US [patent_app_date] => 2005-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4419 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/212/07212064.pdf [firstpage_image] =>[orig_patent_app_number] => 11056549 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/056549
Methods and systems for measuring temperature using digital signals Feb 10, 2005 Issued
Array ( [id] => 5675980 [patent_doc_number] => 20060181335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Low voltage bandgap reference (BGR) circuit' [patent_app_type] => utility [patent_app_number] => 11/056796 [patent_app_country] => US [patent_app_date] => 2005-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3793 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20060181335.pdf [firstpage_image] =>[orig_patent_app_number] => 11056796 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/056796
Low voltage bandgap reference (BGR) circuit Feb 10, 2005 Issued
Array ( [id] => 5665110 [patent_doc_number] => 20060170460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'SILICON-ON-INSULATOR SENSE AMPLIFIER FOR MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 10/906036 [patent_app_country] => US [patent_app_date] => 2005-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2757 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20060170460.pdf [firstpage_image] =>[orig_patent_app_number] => 10906036 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/906036
Silicon-on-insulator sense amplifier for memory cell Jan 30, 2005 Issued
Array ( [id] => 7095519 [patent_doc_number] => 20050127977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/044030 [patent_app_country] => US [patent_app_date] => 2005-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14493 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20050127977.pdf [firstpage_image] =>[orig_patent_app_number] => 11044030 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/044030
Level conversion for use in semiconductor device Jan 27, 2005 Issued
Array ( [id] => 7185262 [patent_doc_number] => 20050162218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-28 [patent_title] => 'Method and apparatus for outputting constant voltage' [patent_app_type] => utility [patent_app_number] => 11/039286 [patent_app_country] => US [patent_app_date] => 2005-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7391 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20050162218.pdf [firstpage_image] =>[orig_patent_app_number] => 11039286 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/039286
Method and apparatus for outputting constant voltage Jan 18, 2005 Issued
Array ( [id] => 521431 [patent_doc_number] => 07193452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-20 [patent_title] => 'Temperature-compensated bias circuit for power amplifier' [patent_app_type] => utility [patent_app_number] => 10/905660 [patent_app_country] => US [patent_app_date] => 2005-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5060 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/193/07193452.pdf [firstpage_image] =>[orig_patent_app_number] => 10905660 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/905660
Temperature-compensated bias circuit for power amplifier Jan 13, 2005 Issued
Array ( [id] => 7172317 [patent_doc_number] => 20050122766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-09 [patent_title] => 'Digital control logic circuit having a characteristic of time hysteresis' [patent_app_type] => utility [patent_app_number] => 11/032201 [patent_app_country] => US [patent_app_date] => 2005-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1999 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20050122766.pdf [firstpage_image] =>[orig_patent_app_number] => 11032201 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/032201
Digital control logic circuit having a characteristic of time hysteresis Jan 10, 2005 Abandoned
Array ( [id] => 5692128 [patent_doc_number] => 20060152273 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'SINGLE-STAGE AND MODULAR MULTI-STAGE CLOCK-BOOSTER' [patent_app_type] => utility [patent_app_number] => 11/033184 [patent_app_country] => US [patent_app_date] => 2005-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 2742 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20060152273.pdf [firstpage_image] =>[orig_patent_app_number] => 11033184 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/033184
Single-stage and modular multi-stage clock-booster Jan 10, 2005 Issued
Array ( [id] => 5692123 [patent_doc_number] => 20060152268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Latch circuit including a data retention latch' [patent_app_type] => utility [patent_app_number] => 11/032225 [patent_app_country] => US [patent_app_date] => 2005-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3558 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20060152268.pdf [firstpage_image] =>[orig_patent_app_number] => 11032225 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/032225
Latch circuit including a data retention latch Jan 10, 2005 Issued
Array ( [id] => 562618 [patent_doc_number] => 07161403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-09 [patent_title] => 'Storage elements using nanotube switching elements' [patent_app_type] => utility [patent_app_number] => 11/032983 [patent_app_country] => US [patent_app_date] => 2005-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 27 [patent_no_of_words] => 10023 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/161/07161403.pdf [firstpage_image] =>[orig_patent_app_number] => 11032983 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/032983
Storage elements using nanotube switching elements Jan 9, 2005 Issued
Array ( [id] => 5791665 [patent_doc_number] => 20060012429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Self biased differential amplifier' [patent_app_type] => utility [patent_app_number] => 11/030255 [patent_app_country] => US [patent_app_date] => 2005-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5187 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20060012429.pdf [firstpage_image] =>[orig_patent_app_number] => 11030255 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/030255
Self biased differential amplifier Jan 5, 2005 Abandoned
Array ( [id] => 5629283 [patent_doc_number] => 20060145751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'ANALOG MOS CIRCUITS HAVING REDUCED VOLTAGE STRESS' [patent_app_type] => utility [patent_app_number] => 10/905436 [patent_app_country] => US [patent_app_date] => 2005-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6025 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20060145751.pdf [firstpage_image] =>[orig_patent_app_number] => 10905436 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/905436
Analog MOS circuits having reduced voltage stress Jan 3, 2005 Issued
Array ( [id] => 717719 [patent_doc_number] => 07053707 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-30 [patent_title] => 'Method and system for implementing autonomous automatic gain control in a low noise broadband distribution amplifier' [patent_app_type] => utility [patent_app_number] => 11/028331 [patent_app_country] => US [patent_app_date] => 2005-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11492 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/053/07053707.pdf [firstpage_image] =>[orig_patent_app_number] => 11028331 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/028331
Method and system for implementing autonomous automatic gain control in a low noise broadband distribution amplifier Jan 3, 2005 Issued
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