
My Trang Ton
Examiner (ID: 3916, Phone: (571)272-1754 , Office: P/3992 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 3992, 2816, 2504 |
| Total Applications | 1512 |
| Issued Applications | 1345 |
| Pending Applications | 95 |
| Abandoned Applications | 73 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 630914
[patent_doc_number] => 07132875
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-11-07
[patent_title] => 'Voltage switching circuit'
[patent_app_type] => utility
[patent_app_number] => 11/139510
[patent_app_country] => US
[patent_app_date] => 2005-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 19
[patent_no_of_words] => 7368
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/132/07132875.pdf
[firstpage_image] =>[orig_patent_app_number] => 11139510
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/139510 | Voltage switching circuit | May 30, 2005 | Issued |
| 90/007546 | CARD TYPE INPUT/OUTPUT INTERFACE DEVICE AND ELECTRONIC DEVICE USING THE SAME | May 17, 2005 | Issued |
Array
(
[id] => 7206046
[patent_doc_number] => 20050258458
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-11-24
[patent_title] => 'JFET driver circuit and JFET driving method'
[patent_app_type] => utility
[patent_app_number] => 11/128200
[patent_app_country] => US
[patent_app_date] => 2005-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5044
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0258/20050258458.pdf
[firstpage_image] =>[orig_patent_app_number] => 11128200
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/128200 | JFET driver circuit and JFET driving method | May 12, 2005 | Issued |
Array
(
[id] => 726398
[patent_doc_number] => 07046067
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-16
[patent_title] => 'Thin-oxide devices for high voltage I/O drivers'
[patent_app_type] => utility
[patent_app_number] => 11/127452
[patent_app_country] => US
[patent_app_date] => 2005-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3798
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 276
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/046/07046067.pdf
[firstpage_image] =>[orig_patent_app_number] => 11127452
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/127452 | Thin-oxide devices for high voltage I/O drivers | May 11, 2005 | Issued |
Array
(
[id] => 7163208
[patent_doc_number] => 20050200385
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-15
[patent_title] => 'Fuse sense circuit'
[patent_app_type] => utility
[patent_app_number] => 11/127501
[patent_app_country] => US
[patent_app_date] => 2005-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3202
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0200/20050200385.pdf
[firstpage_image] =>[orig_patent_app_number] => 11127501
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/127501 | Fuse sense circuit | May 10, 2005 | Issued |
Array
(
[id] => 500743
[patent_doc_number] => 07208994
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-04-24
[patent_title] => 'Fuse sense circuit'
[patent_app_type] => utility
[patent_app_number] => 11/127365
[patent_app_country] => US
[patent_app_date] => 2005-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3210
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/208/07208994.pdf
[firstpage_image] =>[orig_patent_app_number] => 11127365
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/127365 | Fuse sense circuit | May 10, 2005 | Issued |
Array
(
[id] => 485063
[patent_doc_number] => 07221210
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-05-22
[patent_title] => 'Fuse sense circuit'
[patent_app_type] => utility
[patent_app_number] => 11/127750
[patent_app_country] => US
[patent_app_date] => 2005-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3207
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/221/07221210.pdf
[firstpage_image] =>[orig_patent_app_number] => 11127750
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/127750 | Fuse sense circuit | May 10, 2005 | Issued |
Array
(
[id] => 7043789
[patent_doc_number] => 20050248384
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-11-10
[patent_title] => 'Control circuit for semiconductor component'
[patent_app_type] => utility
[patent_app_number] => 11/118781
[patent_app_country] => US
[patent_app_date] => 2005-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3108
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0248/20050248384.pdf
[firstpage_image] =>[orig_patent_app_number] => 11118781
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/118781 | Control circuit for semiconductor component | May 1, 2005 | Issued |
Array
(
[id] => 7216883
[patent_doc_number] => 20050253644
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-11-17
[patent_title] => 'Trimming functional parameters in integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 11/113818
[patent_app_country] => US
[patent_app_date] => 2005-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6042
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0253/20050253644.pdf
[firstpage_image] =>[orig_patent_app_number] => 11113818
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/113818 | Trimming functional parameters in integrated circuits | Apr 24, 2005 | Issued |
Array
(
[id] => 752589
[patent_doc_number] => 07023245
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-04-04
[patent_title] => 'Versatile charge sampling circuits'
[patent_app_type] => utility
[patent_app_number] => 11/099488
[patent_app_country] => US
[patent_app_date] => 2005-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 27
[patent_no_of_words] => 6206
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/023/07023245.pdf
[firstpage_image] =>[orig_patent_app_number] => 11099488
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/099488 | Versatile charge sampling circuits | Apr 5, 2005 | Issued |
Array
(
[id] => 5751556
[patent_doc_number] => 20060220705
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-10-05
[patent_title] => 'High performance low power multiple-level-switching output drivers'
[patent_app_type] => utility
[patent_app_number] => 11/098991
[patent_app_country] => US
[patent_app_date] => 2005-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 10723
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0220/20060220705.pdf
[firstpage_image] =>[orig_patent_app_number] => 11098991
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/098991 | High performance low power multiple-level-switching output drivers | Apr 4, 2005 | Issued |
Array
(
[id] => 470083
[patent_doc_number] => 07233177
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-06-19
[patent_title] => 'Precision tuning of a phase-change resistive element'
[patent_app_type] => utility
[patent_app_number] => 11/098078
[patent_app_country] => US
[patent_app_date] => 2005-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 10042
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/233/07233177.pdf
[firstpage_image] =>[orig_patent_app_number] => 11098078
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/098078 | Precision tuning of a phase-change resistive element | Apr 3, 2005 | Issued |
Array
(
[id] => 6950267
[patent_doc_number] => 20050225361
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Clock selection circuit and digital processing system for reducing glitches'
[patent_app_type] => utility
[patent_app_number] => 11/095490
[patent_app_country] => US
[patent_app_date] => 2005-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4885
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0225/20050225361.pdf
[firstpage_image] =>[orig_patent_app_number] => 11095490
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/095490 | Clock selection circuit and digital processing system for reducing glitches | Mar 31, 2005 | Issued |
Array
(
[id] => 643165
[patent_doc_number] => 07123060
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-10-17
[patent_title] => 'Drive circuit for a switching element'
[patent_app_type] => utility
[patent_app_number] => 10/907397
[patent_app_country] => US
[patent_app_date] => 2005-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3592
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/123/07123060.pdf
[firstpage_image] =>[orig_patent_app_number] => 10907397
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/907397 | Drive circuit for a switching element | Mar 30, 2005 | Issued |
Array
(
[id] => 7016946
[patent_doc_number] => 20050218964
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-06
[patent_title] => 'Active diode'
[patent_app_type] => utility
[patent_app_number] => 11/094369
[patent_app_country] => US
[patent_app_date] => 2005-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5796
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0218/20050218964.pdf
[firstpage_image] =>[orig_patent_app_number] => 11094369
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/094369 | Active diode | Mar 30, 2005 | Issued |
| 90/007452 | UNIVERSAL LIGHTING NETWORK METHODS AND SYSTEMS | Mar 6, 2005 | Issued |
Array
(
[id] => 7073102
[patent_doc_number] => 20050146368
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-07
[patent_title] => 'Adaptive delay of timing control signals'
[patent_app_type] => utility
[patent_app_number] => 11/066385
[patent_app_country] => US
[patent_app_date] => 2005-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4614
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0146/20050146368.pdf
[firstpage_image] =>[orig_patent_app_number] => 11066385
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/066385 | Adaptive delay of timing control signals | Feb 27, 2005 | Issued |
Array
(
[id] => 5653345
[patent_doc_number] => 20060139080
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-29
[patent_title] => 'Data strobe signal generating circuit and data strobe signal generating method'
[patent_app_type] => utility
[patent_app_number] => 11/066010
[patent_app_country] => US
[patent_app_date] => 2005-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3942
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0139/20060139080.pdf
[firstpage_image] =>[orig_patent_app_number] => 11066010
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/066010 | Data strobe signal generating circuit and data strobe signal generating method | Feb 23, 2005 | Issued |
Array
(
[id] => 7048874
[patent_doc_number] => 20050184761
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-25
[patent_title] => 'Comparator circuit'
[patent_app_type] => utility
[patent_app_number] => 11/059389
[patent_app_country] => US
[patent_app_date] => 2005-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5141
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0184/20050184761.pdf
[firstpage_image] =>[orig_patent_app_number] => 11059389
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/059389 | Comparator circuit | Feb 16, 2005 | Issued |
Array
(
[id] => 7239242
[patent_doc_number] => 20050140410
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-30
[patent_title] => 'Circuit for modifying a clock signal to achieve a predetermined duty cycle'
[patent_app_type] => utility
[patent_app_number] => 11/060842
[patent_app_country] => US
[patent_app_date] => 2005-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4763
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0140/20050140410.pdf
[firstpage_image] =>[orig_patent_app_number] => 11060842
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/060842 | Circuit for modifying a clock signal to achieve a predetermined duty cycle | Feb 16, 2005 | Abandoned |