
My Trang Ton
Examiner (ID: 9286)
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2816, 2504, 3992 |
| Total Applications | 1495 |
| Issued Applications | 1343 |
| Pending Applications | 84 |
| Abandoned Applications | 72 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 793528
[patent_doc_number] => 06982574
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-01-03
[patent_title] => 'Method of forming a transistor driver and structure therefor'
[patent_app_type] => utility
[patent_app_number] => 10/805405
[patent_app_country] => US
[patent_app_date] => 2004-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2657
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/982/06982574.pdf
[firstpage_image] =>[orig_patent_app_number] => 10805405
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/805405 | Method of forming a transistor driver and structure therefor | Mar 21, 2004 | Issued |
Array
(
[id] => 1074253
[patent_doc_number] => 06838919
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-01-04
[patent_title] => 'DCVSL pulse width controller and system'
[patent_app_type] => utility
[patent_app_number] => 10/803823
[patent_app_country] => US
[patent_app_date] => 2004-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 31
[patent_no_of_words] => 16174
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/838/06838919.pdf
[firstpage_image] =>[orig_patent_app_number] => 10803823
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/803823 | DCVSL pulse width controller and system | Mar 16, 2004 | Issued |
Array
(
[id] => 7619589
[patent_doc_number] => 06943597
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-09-13
[patent_title] => 'Hard phase alignment of clock signals with an oscillator controller'
[patent_app_type] => utility
[patent_app_number] => 10/803338
[patent_app_country] => US
[patent_app_date] => 2004-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 31
[patent_no_of_words] => 16034
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/943/06943597.pdf
[firstpage_image] =>[orig_patent_app_number] => 10803338
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/803338 | Hard phase alignment of clock signals with an oscillator controller | Mar 16, 2004 | Issued |
Array
(
[id] => 7108959
[patent_doc_number] => 20050206412
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-22
[patent_title] => 'HIGH FREQUENCY DIFFERENTIAL POWER AMPLIFIER'
[patent_app_type] => utility
[patent_app_number] => 10/802894
[patent_app_country] => US
[patent_app_date] => 2004-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4651
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0206/20050206412.pdf
[firstpage_image] =>[orig_patent_app_number] => 10802894
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/802894 | High frequency differential power amplifier | Mar 15, 2004 | Issued |
Array
(
[id] => 7239305
[patent_doc_number] => 20050140420
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-30
[patent_title] => 'CLAMPING CIRCUIT FOR HIGH-SPEED LOW-SIDE DRIVER OUTPUTS'
[patent_app_type] => utility
[patent_app_number] => 10/798150
[patent_app_country] => US
[patent_app_date] => 2004-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3158
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0140/20050140420.pdf
[firstpage_image] =>[orig_patent_app_number] => 10798150
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/798150 | Clamping circuit for high-speed low-side driver outputs | Mar 9, 2004 | Issued |
Array
(
[id] => 973032
[patent_doc_number] => 06937086
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-08-30
[patent_title] => 'Method and apparatus for operating a field-effect transistor (FET) pair'
[patent_app_type] => utility
[patent_app_number] => 10/796405
[patent_app_country] => US
[patent_app_date] => 2004-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 5562
[patent_no_of_claims] => 41
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/937/06937086.pdf
[firstpage_image] =>[orig_patent_app_number] => 10796405
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/796405 | Method and apparatus for operating a field-effect transistor (FET) pair | Mar 7, 2004 | Issued |
Array
(
[id] => 643168
[patent_doc_number] => 07123062
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-17
[patent_title] => 'Power-up circuit in semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 10/788549
[patent_app_country] => US
[patent_app_date] => 2004-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2901
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/123/07123062.pdf
[firstpage_image] =>[orig_patent_app_number] => 10788549
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/788549 | Power-up circuit in semiconductor memory device | Feb 26, 2004 | Issued |
Array
(
[id] => 7177819
[patent_doc_number] => 20050189969
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-01
[patent_title] => 'Total harmonic distortion standard'
[patent_app_type] => utility
[patent_app_number] => 10/788935
[patent_app_country] => US
[patent_app_date] => 2004-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2626
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0189/20050189969.pdf
[firstpage_image] =>[orig_patent_app_number] => 10788935
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/788935 | Total harmonic distortion standard | Feb 26, 2004 | Issued |
Array
(
[id] => 7609292
[patent_doc_number] => 06998897
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-14
[patent_title] => 'System and method for implementing a micro-stepping delay chain for a delay locked loop'
[patent_app_type] => utility
[patent_app_number] => 10/708311
[patent_app_country] => US
[patent_app_date] => 2004-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 4729
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/998/06998897.pdf
[firstpage_image] =>[orig_patent_app_number] => 10708311
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/708311 | System and method for implementing a micro-stepping delay chain for a delay locked loop | Feb 23, 2004 | Issued |
Array
(
[id] => 721795
[patent_doc_number] => 07049873
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-23
[patent_title] => 'System and method for implementing a micro-stepping delay chain for a delay locked loop'
[patent_app_type] => utility
[patent_app_number] => 10/708287
[patent_app_country] => US
[patent_app_date] => 2004-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 4693
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/049/07049873.pdf
[firstpage_image] =>[orig_patent_app_number] => 10708287
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/708287 | System and method for implementing a micro-stepping delay chain for a delay locked loop | Feb 22, 2004 | Issued |
Array
(
[id] => 7335102
[patent_doc_number] => 20040189349
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-30
[patent_title] => 'Device and method for converting an input signal'
[patent_app_type] => new
[patent_app_number] => 10/783068
[patent_app_country] => US
[patent_app_date] => 2004-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3708
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0189/20040189349.pdf
[firstpage_image] =>[orig_patent_app_number] => 10783068
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/783068 | Device and method for converting an input signal | Feb 19, 2004 | Issued |
Array
(
[id] => 7133563
[patent_doc_number] => 20050179473
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-18
[patent_title] => 'Active hybrid transformer circuit having a replica driver'
[patent_app_type] => utility
[patent_app_number] => 10/777676
[patent_app_country] => US
[patent_app_date] => 2004-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5639
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0179/20050179473.pdf
[firstpage_image] =>[orig_patent_app_number] => 10777676
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/777676 | Active hybrid transformer circuit having a replica driver | Feb 12, 2004 | Issued |
Array
(
[id] => 743645
[patent_doc_number] => 07030678
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-04-18
[patent_title] => 'Level shifter that provides high-speed operation between power domains that have a large voltage difference'
[patent_app_type] => utility
[patent_app_number] => 10/776834
[patent_app_country] => US
[patent_app_date] => 2004-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 5356
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/030/07030678.pdf
[firstpage_image] =>[orig_patent_app_number] => 10776834
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/776834 | Level shifter that provides high-speed operation between power domains that have a large voltage difference | Feb 10, 2004 | Issued |
Array
(
[id] => 6910402
[patent_doc_number] => 20050174160
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-11
[patent_title] => 'Phase multiplier circuit'
[patent_app_type] => utility
[patent_app_number] => 10/775310
[patent_app_country] => US
[patent_app_date] => 2004-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2230
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0174/20050174160.pdf
[firstpage_image] =>[orig_patent_app_number] => 10775310
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/775310 | Phase multiplier circuit | Feb 9, 2004 | Issued |
Array
(
[id] => 541965
[patent_doc_number] => 07176728
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-02-13
[patent_title] => 'High voltage low power driver'
[patent_app_type] => utility
[patent_app_number] => 10/774806
[patent_app_country] => US
[patent_app_date] => 2004-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2591
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/176/07176728.pdf
[firstpage_image] =>[orig_patent_app_number] => 10774806
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/774806 | High voltage low power driver | Feb 9, 2004 | Issued |
Array
(
[id] => 717683
[patent_doc_number] => 07053687
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-05-30
[patent_title] => 'Binary hysteresis comparator circuits and methods'
[patent_app_type] => utility
[patent_app_number] => 10/772820
[patent_app_country] => US
[patent_app_date] => 2004-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 7018
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 241
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/053/07053687.pdf
[firstpage_image] =>[orig_patent_app_number] => 10772820
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/772820 | Binary hysteresis comparator circuits and methods | Feb 4, 2004 | Issued |
Array
(
[id] => 7339715
[patent_doc_number] => 20040246031
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-09
[patent_title] => 'Ultra-low power programmable timer and low voltage detection circuits'
[patent_app_type] => new
[patent_app_number] => 10/764919
[patent_app_country] => US
[patent_app_date] => 2004-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2808
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0246/20040246031.pdf
[firstpage_image] =>[orig_patent_app_number] => 10764919
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/764919 | Ultra-low power programmable timer and low voltage detection circuits | Jan 25, 2004 | Issued |
Array
(
[id] => 735196
[patent_doc_number] => 07038526
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-05-02
[patent_title] => 'Method and apparatus facilitating operation of a resonant tunneling device at a high frequency'
[patent_app_type] => utility
[patent_app_number] => 10/762858
[patent_app_country] => US
[patent_app_date] => 2004-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 11
[patent_no_of_words] => 4993
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/038/07038526.pdf
[firstpage_image] =>[orig_patent_app_number] => 10762858
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/762858 | Method and apparatus facilitating operation of a resonant tunneling device at a high frequency | Jan 20, 2004 | Issued |
Array
(
[id] => 756968
[patent_doc_number] => 07019563
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-03-28
[patent_title] => 'Waveform shaping circuit'
[patent_app_type] => utility
[patent_app_number] => 10/505629
[patent_app_country] => US
[patent_app_date] => 2004-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 24
[patent_no_of_words] => 8969
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 253
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/019/07019563.pdf
[firstpage_image] =>[orig_patent_app_number] => 10505629
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/505629 | Waveform shaping circuit | Jan 20, 2004 | Issued |
Array
(
[id] => 7238511
[patent_doc_number] => 20040257142
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-23
[patent_title] => 'Semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/757593
[patent_app_country] => US
[patent_app_date] => 2004-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 22578
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0257/20040257142.pdf
[firstpage_image] =>[orig_patent_app_number] => 10757593
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/757593 | Semiconductor device | Jan 14, 2004 | Issued |