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Examiner (ID: 9286)

Most Active Art Unit
2816
Art Unit(s)
2816, 2504, 3992
Total Applications
1495
Issued Applications
1343
Pending Applications
84
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1060534 [patent_doc_number] => 06853220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-08 [patent_title] => 'Method and amplification circuit with pre-emphasis' [patent_app_type] => utility [patent_app_number] => 10/679943 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2153 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/853/06853220.pdf [firstpage_image] =>[orig_patent_app_number] => 10679943 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/679943
Method and amplification circuit with pre-emphasis Oct 5, 2003 Issued
Array ( [id] => 7329763 [patent_doc_number] => 20040130355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-08 [patent_title] => 'High-voltage detecting circuit' [patent_app_type] => new [patent_app_number] => 10/673226 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3819 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20040130355.pdf [firstpage_image] =>[orig_patent_app_number] => 10673226 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/673226
High-voltage detecting circuit Sep 29, 2003 Issued
Array ( [id] => 7619579 [patent_doc_number] => 06943607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-13 [patent_title] => 'Method and device for generating delay signal' [patent_app_type] => utility [patent_app_number] => 10/672406 [patent_app_country] => US [patent_app_date] => 2003-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5850 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/943/06943607.pdf [firstpage_image] =>[orig_patent_app_number] => 10672406 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/672406
Method and device for generating delay signal Sep 25, 2003 Issued
Array ( [id] => 785977 [patent_doc_number] => 06989703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-24 [patent_title] => 'Shared delay circuit of a semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/673014 [patent_app_country] => US [patent_app_date] => 2003-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 4108 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/989/06989703.pdf [firstpage_image] =>[orig_patent_app_number] => 10673014 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/673014
Shared delay circuit of a semiconductor device Sep 25, 2003 Issued
Array ( [id] => 770661 [patent_doc_number] => 07005895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-28 [patent_title] => 'Driver circuit with frequency-dependent signal feedback' [patent_app_type] => utility [patent_app_number] => 10/674119 [patent_app_country] => US [patent_app_date] => 2003-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2417 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/005/07005895.pdf [firstpage_image] =>[orig_patent_app_number] => 10674119 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/674119
Driver circuit with frequency-dependent signal feedback Sep 25, 2003 Issued
Array ( [id] => 7189494 [patent_doc_number] => 20040084695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Input and output circuit of semiconductor device' [patent_app_type] => new [patent_app_number] => 10/670592 [patent_app_country] => US [patent_app_date] => 2003-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7626 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20040084695.pdf [firstpage_image] =>[orig_patent_app_number] => 10670592 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/670592
Input and output circuit of semiconductor device Sep 24, 2003 Issued
Array ( [id] => 7296534 [patent_doc_number] => 20040124887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Circuit device with clock pulse detection facility' [patent_app_type] => new [patent_app_number] => 10/668683 [patent_app_country] => US [patent_app_date] => 2003-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6091 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20040124887.pdf [firstpage_image] =>[orig_patent_app_number] => 10668683 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/668683
Circuit device with clock pulse detection facility Sep 22, 2003 Issued
Array ( [id] => 7373501 [patent_doc_number] => 20040080344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-29 [patent_title] => 'Clock skew indicating apparatus' [patent_app_type] => new [patent_app_number] => 10/665294 [patent_app_country] => US [patent_app_date] => 2003-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2015 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20040080344.pdf [firstpage_image] =>[orig_patent_app_number] => 10665294 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/665294
Clock skew indicating apparatus Sep 21, 2003 Issued
Array ( [id] => 1047731 [patent_doc_number] => 06864735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-08 [patent_title] => 'Circuit and method for regenerating reset and clock signals and high-speed digital system incorporating the same' [patent_app_type] => utility [patent_app_number] => 10/665175 [patent_app_country] => US [patent_app_date] => 2003-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 6193 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/864/06864735.pdf [firstpage_image] =>[orig_patent_app_number] => 10665175 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/665175
Circuit and method for regenerating reset and clock signals and high-speed digital system incorporating the same Sep 17, 2003 Issued
Array ( [id] => 7296613 [patent_doc_number] => 20040124919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Method and system for implementing autonomous automatic gain control in a low noise broadband distribution amplifier' [patent_app_type] => new [patent_app_number] => 10/658837 [patent_app_country] => US [patent_app_date] => 2003-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11574 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20040124919.pdf [firstpage_image] =>[orig_patent_app_number] => 10658837 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/658837
Method and system for implementing autonomous automatic gain control in a low noise broadband distribution amplifier Sep 9, 2003 Issued
Array ( [id] => 7461860 [patent_doc_number] => 20040095200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'Signal transmission circuit and electronic equipment' [patent_app_type] => new [patent_app_number] => 10/657178 [patent_app_country] => US [patent_app_date] => 2003-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8318 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20040095200.pdf [firstpage_image] =>[orig_patent_app_number] => 10657178 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/657178
Signal transmission circuit and electronic equipment Sep 8, 2003 Issued
Array ( [id] => 994132 [patent_doc_number] => 06917233 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-07-12 [patent_title] => 'Limiting amplifier and method for amplifying an input signal' [patent_app_type] => utility [patent_app_number] => 10/657428 [patent_app_country] => US [patent_app_date] => 2003-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4406 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/917/06917233.pdf [firstpage_image] =>[orig_patent_app_number] => 10657428 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/657428
Limiting amplifier and method for amplifying an input signal Sep 7, 2003 Issued
Array ( [id] => 1054142 [patent_doc_number] => 06859076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-22 [patent_title] => 'Combination triangular waveform generator and triangular to pseudo-sinusoidal waveform converter circuit' [patent_app_type] => utility [patent_app_number] => 10/657688 [patent_app_country] => US [patent_app_date] => 2003-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 14 [patent_no_of_words] => 3345 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/859/06859076.pdf [firstpage_image] =>[orig_patent_app_number] => 10657688 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/657688
Combination triangular waveform generator and triangular to pseudo-sinusoidal waveform converter circuit Sep 7, 2003 Issued
Array ( [id] => 7449245 [patent_doc_number] => 20040051568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'Transistor output circuit, semiconductor device including transistor output circuit, and switching electric power unit having transistor output circuit' [patent_app_type] => new [patent_app_number] => 10/658485 [patent_app_country] => US [patent_app_date] => 2003-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4670 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20040051568.pdf [firstpage_image] =>[orig_patent_app_number] => 10658485 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/658485
Transistor output circuit, semiconductor device including transistor output circuit, and switching electric power unit having transistor output circuit Sep 7, 2003 Issued
Array ( [id] => 1086824 [patent_doc_number] => 06831488 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-14 [patent_title] => 'Semiconductor integrated circuit device having an active pull-up/pull-down circuit' [patent_app_type] => B1 [patent_app_number] => 10/654946 [patent_app_country] => US [patent_app_date] => 2003-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 6103 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/831/06831488.pdf [firstpage_image] =>[orig_patent_app_number] => 10654946 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/654946
Semiconductor integrated circuit device having an active pull-up/pull-down circuit Sep 4, 2003 Issued
Array ( [id] => 7261743 [patent_doc_number] => 20040150447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Duty-cycle adjustable buffer and method and method for operating same' [patent_app_type] => new [patent_app_number] => 10/652056 [patent_app_country] => US [patent_app_date] => 2003-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4138 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20040150447.pdf [firstpage_image] =>[orig_patent_app_number] => 10652056 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/652056
Duty-cycle adjustable buffer and method and method for operating same Aug 28, 2003 Issued
Array ( [id] => 7292396 [patent_doc_number] => 20040212401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-28 [patent_title] => 'High frequency signal peak detector' [patent_app_type] => new [patent_app_number] => 10/645028 [patent_app_country] => US [patent_app_date] => 2003-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5191 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20040212401.pdf [firstpage_image] =>[orig_patent_app_number] => 10645028 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/645028
High frequency signal peak detector Aug 20, 2003 Issued
Array ( [id] => 7610803 [patent_doc_number] => 06842055 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-11 [patent_title] => 'Clock adjustment' [patent_app_type] => utility [patent_app_number] => 10/639818 [patent_app_country] => US [patent_app_date] => 2003-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6946 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/842/06842055.pdf [firstpage_image] =>[orig_patent_app_number] => 10639818 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/639818
Clock adjustment Aug 12, 2003 Issued
Array ( [id] => 1129015 [patent_doc_number] => 06791368 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Current sensing circuit and method of a high-speed driving stage' [patent_app_type] => B2 [patent_app_number] => 10/639046 [patent_app_country] => US [patent_app_date] => 2003-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2359 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791368.pdf [firstpage_image] =>[orig_patent_app_number] => 10639046 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/639046
Current sensing circuit and method of a high-speed driving stage Aug 11, 2003 Issued
Array ( [id] => 1081675 [patent_doc_number] => 06836158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-28 [patent_title] => 'Signal sampling method and circuit for improved hold mode isolation' [patent_app_type] => B2 [patent_app_number] => 10/639544 [patent_app_country] => US [patent_app_date] => 2003-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2561 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/836/06836158.pdf [firstpage_image] =>[orig_patent_app_number] => 10639544 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/639544
Signal sampling method and circuit for improved hold mode isolation Aug 11, 2003 Issued
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