My Trang Ton

Array ( [id] => 1117307 [patent_doc_number] => 06801085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-05 [patent_title] => 'System and method for activating gain stages in an amplification module' [patent_app_type] => B2 [patent_app_number] => 10/630870 [patent_app_country] => US [patent_app_date] => 2003-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11464 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/801/06801085.pdf [firstpage_image] =>[orig_patent_app_number] => 10630870 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1019064 [patent_doc_number] => 06891419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'Methods and apparatus for employing feedback body control in cross-coupled inverters' [patent_app_type] => utility [patent_app_number] => 10/604554 [patent_app_country] => US [patent_app_date] => 2003-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3208 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/891/06891419.pdf [firstpage_image] =>[orig_patent_app_number] => 10604554 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7149058 [patent_doc_number] => 20050024121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Methods and systems for reducing leakage current in semiconductor circuits' [patent_app_type] => utility [patent_app_number] => 10/628906 [patent_app_country] => US [patent_app_date] => 2003-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9340 [patent_no_of_claims] => 86 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20050024121.pdf [firstpage_image] =>[orig_patent_app_number] => 10628906 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7389773 [patent_doc_number] => 20040017241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Clock control method and circuit' [patent_app_type] => new [patent_app_number] => 10/627632 [patent_app_country] => US [patent_app_date] => 2003-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 13877 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 27 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20040017241.pdf [firstpage_image] =>[orig_patent_app_number] => 10627632 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1090515 [patent_doc_number] => 06828844 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-07 [patent_title] => 'Mixer which assures satisfactory performance even at low supply voltage' [patent_app_type] => B2 [patent_app_number] => 10/628213 [patent_app_country] => US [patent_app_date] => 2003-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3848 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/828/06828844.pdf [firstpage_image] =>[orig_patent_app_number] => 10628213 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7629188 [patent_doc_number] => 06819169 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-16 [patent_title] => 'Isolation interface with capacitive barrier and method for transmitting a signal by means of such isolation interface' [patent_app_type] => B1 [patent_app_number] => 10/626862 [patent_app_country] => US [patent_app_date] => 2003-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4656 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 8 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/819/06819169.pdf [firstpage_image] =>[orig_patent_app_number] => 10626862 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6970096 [patent_doc_number] => 20050035806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Circuit and method to protect EEPROM data during ESD events' [patent_app_type] => utility [patent_app_number] => 10/626091 [patent_app_country] => US [patent_app_date] => 2003-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1592 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20050035806.pdf [firstpage_image] =>[orig_patent_app_number] => 10626091 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1006393 [patent_doc_number] => 06906564 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-14 [patent_title] => 'Apparatus and method for delay matching of full and divided clock signals' [patent_app_type] => utility [patent_app_number] => 10/622708 [patent_app_country] => US [patent_app_date] => 2003-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4477 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/906/06906564.pdf [firstpage_image] =>[orig_patent_app_number] => 10622708 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1117280 [patent_doc_number] => 06801071 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-05 [patent_title] => 'Semiconductor integrated circuit device with differential output driver circuit, and system for semiconductor integrated circuit device' [patent_app_type] => B1 [patent_app_number] => 10/620382 [patent_app_country] => US [patent_app_date] => 2003-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 8130 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/801/06801071.pdf [firstpage_image] =>[orig_patent_app_number] => 10620382 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7335104 [patent_doc_number] => 20040189350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING A DIFFERENTIAL TRANSISTOR PAIR' [patent_app_type] => new [patent_app_number] => 10/615932 [patent_app_country] => US [patent_app_date] => 2003-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12777 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20040189350.pdf [firstpage_image] =>[orig_patent_app_number] => 10615932 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7429737 [patent_doc_number] => 20040008070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Clamp circuit' [patent_app_type] => new [patent_app_number] => 10/616426 [patent_app_country] => US [patent_app_date] => 2003-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8423 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20040008070.pdf [firstpage_image] =>[orig_patent_app_number] => 10616426 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1137560 [patent_doc_number] => 06784708 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-31 [patent_title] => 'Slew rate sensing and control of a high-voltage output driver for a variable voltage range and variable output load' [patent_app_type] => B1 [patent_app_number] => 10/615123 [patent_app_country] => US [patent_app_date] => 2003-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3995 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/784/06784708.pdf [firstpage_image] =>[orig_patent_app_number] => 10615123 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1142265 [patent_doc_number] => 06781423 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-24 [patent_title] => 'High-voltage interface and driver control circuit' [patent_app_type] => B1 [patent_app_number] => 10/614660 [patent_app_country] => US [patent_app_date] => 2003-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 11395 [patent_no_of_claims] => 132 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 371 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/781/06781423.pdf [firstpage_image] =>[orig_patent_app_number] => 10614660 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1133485 [patent_doc_number] => 06788114 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-07 [patent_title] => 'Comparator with high-voltage inputs in an extended CMOS process for higher voltage levels' [patent_app_type] => B1 [patent_app_number] => 10/614663 [patent_app_country] => US [patent_app_date] => 2003-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2317 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/788/06788114.pdf [firstpage_image] =>[orig_patent_app_number] => 10614663 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 959152 [patent_doc_number] => 06954099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-11 [patent_title] => 'Level shifter without dutycycle distortion' [patent_app_type] => utility [patent_app_number] => 10/613381 [patent_app_country] => US [patent_app_date] => 2003-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4555 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/954/06954099.pdf [firstpage_image] =>[orig_patent_app_number] => 10613381 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1054138 [patent_doc_number] => 06859075 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-22 [patent_title] => 'High-speed output buffer' [patent_app_type] => utility [patent_app_number] => 10/612371 [patent_app_country] => US [patent_app_date] => 2003-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7025 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/859/06859075.pdf [firstpage_image] =>[orig_patent_app_number] => 10612371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7296560 [patent_doc_number] => 20040124897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Digital control logic circuit having a characteristic of time hysteresis' [patent_app_type] => new [patent_app_number] => 10/608569 [patent_app_country] => US [patent_app_date] => 2003-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2049 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20040124897.pdf [firstpage_image] =>[orig_patent_app_number] => 10608569 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1137532 [patent_doc_number] => 06784703 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-31 [patent_title] => 'Dynamic driver boost circuits' [patent_app_type] => B1 [patent_app_number] => 10/604175 [patent_app_country] => US [patent_app_date] => 2003-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 3440 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/784/06784703.pdf [firstpage_image] =>[orig_patent_app_number] => 10604175 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 542054 [patent_doc_number] => 07176739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-13 [patent_title] => 'Circuit to improve data bus performance' [patent_app_type] => utility [patent_app_number] => 10/609111 [patent_app_country] => US [patent_app_date] => 2003-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2480 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/176/07176739.pdf [firstpage_image] =>[orig_patent_app_number] => 10609111 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1009923 [patent_doc_number] => 06900687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-31 [patent_title] => 'Circuitry and method to provide a high speed comparator for an input stage of a low-voltage differential signal receiver circuit' [patent_app_type] => utility [patent_app_number] => 10/609006 [patent_app_country] => US [patent_app_date] => 2003-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2337 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/900/06900687.pdf [firstpage_image] =>[orig_patent_app_number] => 10609006 [rel_patent_id] =>[rel_patent_doc_number] =>)