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Examiner (ID: 3916, Phone: (571)272-1754 , Office: P/3992 )

Most Active Art Unit
2816
Art Unit(s)
3992, 2816, 2504
Total Applications
1512
Issued Applications
1345
Pending Applications
95
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1086822 [patent_doc_number] => 06831487 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-14 [patent_title] => 'Pattern based dynamic drive current balancing for data transmission' [patent_app_type] => B2 [patent_app_number] => 10/393303 [patent_app_country] => US [patent_app_date] => 2003-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3189 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/831/06831487.pdf [firstpage_image] =>[orig_patent_app_number] => 10393303 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/393303
Pattern based dynamic drive current balancing for data transmission Mar 19, 2003 Issued
Array ( [id] => 7619575 [patent_doc_number] => 06943611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-13 [patent_title] => 'Drive control circuit for a junction field-effect transistor' [patent_app_type] => utility [patent_app_number] => 10/392704 [patent_app_country] => US [patent_app_date] => 2003-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2443 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/943/06943611.pdf [firstpage_image] =>[orig_patent_app_number] => 10392704 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/392704
Drive control circuit for a junction field-effect transistor Mar 19, 2003 Issued
Array ( [id] => 6768396 [patent_doc_number] => 20030214336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Temperature sensing circuit' [patent_app_type] => new [patent_app_number] => 10/390699 [patent_app_country] => US [patent_app_date] => 2003-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4949 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20030214336.pdf [firstpage_image] =>[orig_patent_app_number] => 10390699 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/390699
Temperature sensing circuit Mar 18, 2003 Issued
Array ( [id] => 747460 [patent_doc_number] => 07026858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-11 [patent_title] => 'Switch semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 10/390777 [patent_app_country] => US [patent_app_date] => 2003-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5683 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/026/07026858.pdf [firstpage_image] =>[orig_patent_app_number] => 10390777 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/390777
Switch semiconductor integrated circuit Mar 18, 2003 Issued
Array ( [id] => 1064093 [patent_doc_number] => 06850104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-01 [patent_title] => 'Master-slave latch with transparent mode' [patent_app_type] => utility [patent_app_number] => 10/385114 [patent_app_country] => US [patent_app_date] => 2003-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5398 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/850/06850104.pdf [firstpage_image] =>[orig_patent_app_number] => 10385114 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/385114
Master-slave latch with transparent mode Mar 9, 2003 Issued
Array ( [id] => 7395388 [patent_doc_number] => 20040174196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Circuit for modifying a clock signal to achieve a predetermined duty cycle' [patent_app_type] => new [patent_app_number] => 10/384262 [patent_app_country] => US [patent_app_date] => 2003-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4803 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20040174196.pdf [firstpage_image] =>[orig_patent_app_number] => 10384262 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/384262
Circuit for modifying a clock signal to achieve a predetermined duty cycle Mar 6, 2003 Issued
Array ( [id] => 1019070 [patent_doc_number] => 06891423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'Quadrature switching mixer with reduced leakage' [patent_app_type] => utility [patent_app_number] => 10/383370 [patent_app_country] => US [patent_app_date] => 2003-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3395 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/891/06891423.pdf [firstpage_image] =>[orig_patent_app_number] => 10383370 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/383370
Quadrature switching mixer with reduced leakage Mar 5, 2003 Issued
Array ( [id] => 7395369 [patent_doc_number] => 20040174192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Method and apparatus for reconfigurable frequency generation' [patent_app_type] => new [patent_app_number] => 10/382696 [patent_app_country] => US [patent_app_date] => 2003-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3101 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20040174192.pdf [firstpage_image] =>[orig_patent_app_number] => 10382696 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/382696
Method and apparatus for reconfigurable frequency generation Mar 5, 2003 Issued
Array ( [id] => 1214795 [patent_doc_number] => 06710639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-23 [patent_title] => 'Emitter turn-off thyristors and their drive circuits' [patent_app_type] => B2 [patent_app_number] => 10/378606 [patent_app_country] => US [patent_app_date] => 2003-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8539 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/710/06710639.pdf [firstpage_image] =>[orig_patent_app_number] => 10378606 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/378606
Emitter turn-off thyristors and their drive circuits Mar 4, 2003 Issued
Array ( [id] => 1203839 [patent_doc_number] => 06720807 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-13 [patent_title] => 'Semiconductor device with clock generation circuit' [patent_app_type] => B1 [patent_app_number] => 10/377738 [patent_app_country] => US [patent_app_date] => 2003-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 11185 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/720/06720807.pdf [firstpage_image] =>[orig_patent_app_number] => 10377738 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/377738
Semiconductor device with clock generation circuit Mar 3, 2003 Issued
Array ( [id] => 1015353 [patent_doc_number] => 06894552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'Low-jitter delay cell' [patent_app_type] => utility [patent_app_number] => 10/376664 [patent_app_country] => US [patent_app_date] => 2003-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2436 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894552.pdf [firstpage_image] =>[orig_patent_app_number] => 10376664 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/376664
Low-jitter delay cell Feb 27, 2003 Issued
Array ( [id] => 1218636 [patent_doc_number] => 06707332 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-16 [patent_title] => 'Clock generating circuit and method thereof' [patent_app_type] => B1 [patent_app_number] => 10/248870 [patent_app_country] => US [patent_app_date] => 2003-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4855 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/707/06707332.pdf [firstpage_image] =>[orig_patent_app_number] => 10248870 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/248870
Clock generating circuit and method thereof Feb 25, 2003 Issued
Array ( [id] => 6795922 [patent_doc_number] => 20030174795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Clock generator, particularly for USB devices' [patent_app_type] => new [patent_app_number] => 10/373891 [patent_app_country] => US [patent_app_date] => 2003-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2806 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174795.pdf [firstpage_image] =>[orig_patent_app_number] => 10373891 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/373891
Clock generator, particularly for USB devices Feb 24, 2003 Issued
Array ( [id] => 7130575 [patent_doc_number] => 20040041604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Phase jumping locked loop circuit' [patent_app_type] => new [patent_app_number] => 10/374251 [patent_app_country] => US [patent_app_date] => 2003-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 26931 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20040041604.pdf [firstpage_image] =>[orig_patent_app_number] => 10374251 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/374251
Phase jumping locked loop circuit Feb 24, 2003 Issued
Array ( [id] => 6677177 [patent_doc_number] => 20030227317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-11 [patent_title] => 'Circuit arrangement for a current-controlled resistor having an enlarged linear range' [patent_app_type] => new [patent_app_number] => 10/369929 [patent_app_country] => US [patent_app_date] => 2003-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2244 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20030227317.pdf [firstpage_image] =>[orig_patent_app_number] => 10369929 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/369929
Circuit arrangement for a current-controlled resistor having an enlarged linear range Feb 18, 2003 Issued
Array ( [id] => 7429781 [patent_doc_number] => 20040008073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Output circuit, input circuit, electronic circuit, multiplexer, demultiplexer, wired-or circuit, wired-and circuit, pulse-processing circuit, multiphase-clock processing circuit, and clock-multiplier circuit' [patent_app_type] => new [patent_app_number] => 10/359021 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 19804 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20040008073.pdf [firstpage_image] =>[orig_patent_app_number] => 10359021 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/359021
OUTPUT CIRCUIT, INPUT CIRCUIT, ELECTRONIC CIRCUIT, MULTIPLEXER, DEMULTIPLEXER, WIRED-OR CIRCUIT, WIRED-AND CIRCUIT, PULSE-PROCESSING CIRCUIT, MULTIPHASE-CLOCK PROCESSING CIRCUIT, AND CLOCK-MULTIPLIER CIRCUIT Feb 4, 2003 Issued
Array ( [id] => 7624939 [patent_doc_number] => 06724232 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-20 [patent_title] => 'Dual tristate path output buffer control' [patent_app_type] => B1 [patent_app_number] => 10/353375 [patent_app_country] => US [patent_app_date] => 2003-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3611 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/724/06724232.pdf [firstpage_image] =>[orig_patent_app_number] => 10353375 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/353375
Dual tristate path output buffer control Jan 28, 2003 Issued
Array ( [id] => 1074247 [patent_doc_number] => 06838913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-04 [patent_title] => 'Charge/discharge current detection circuit and variable resistor' [patent_app_type] => utility [patent_app_number] => 10/349309 [patent_app_country] => US [patent_app_date] => 2003-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5802 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/838/06838913.pdf [firstpage_image] =>[orig_patent_app_number] => 10349309 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/349309
Charge/discharge current detection circuit and variable resistor Jan 21, 2003 Issued
Array ( [id] => 6795130 [patent_doc_number] => 20030174003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => new [patent_app_number] => 10/333021 [patent_app_country] => US [patent_app_date] => 2003-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3910 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174003.pdf [firstpage_image] =>[orig_patent_app_number] => 10333021 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/333021
Semiconductor integrated circuit Jan 14, 2003 Issued
Array ( [id] => 726338 [patent_doc_number] => 07046049 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-16 [patent_title] => 'Driver circuit for controlling a resonant converter' [patent_app_type] => utility [patent_app_number] => 10/501292 [patent_app_country] => US [patent_app_date] => 2003-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4576 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/046/07046049.pdf [firstpage_image] =>[orig_patent_app_number] => 10501292 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/501292
Driver circuit for controlling a resonant converter Jan 8, 2003 Issued
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