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Examiner (ID: 3916, Phone: (571)272-1754 , Office: P/3992 )

Most Active Art Unit
2816
Art Unit(s)
3992, 2816, 2504
Total Applications
1512
Issued Applications
1345
Pending Applications
95
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6812122 [patent_doc_number] => 20030071672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'Clamp circuit for a semiconductor integrated circuit device' [patent_app_type] => new [patent_app_number] => 10/270808 [patent_app_country] => US [patent_app_date] => 2002-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7616 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20030071672.pdf [firstpage_image] =>[orig_patent_app_number] => 10270808 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/270808
Clamp circuit for a semiconductor integrated circuit device Oct 13, 2002 Issued
Array ( [id] => 1254890 [patent_doc_number] => 06670841 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-30 [patent_title] => 'Level shifting circuit' [patent_app_type] => B2 [patent_app_number] => 10/267666 [patent_app_country] => US [patent_app_date] => 2002-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9238 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 423 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/670/06670841.pdf [firstpage_image] =>[orig_patent_app_number] => 10267666 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/267666
Level shifting circuit Oct 9, 2002 Issued
Array ( [id] => 6748431 [patent_doc_number] => 20030042951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-06 [patent_title] => 'Variable delay circuit and method, and delay locked loop, memory device and computer system using same' [patent_app_type] => new [patent_app_number] => 10/268225 [patent_app_country] => US [patent_app_date] => 2002-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5682 [patent_no_of_claims] => 77 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20030042951.pdf [firstpage_image] =>[orig_patent_app_number] => 10268225 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/268225
Variable delay circuit and method, and delay locked loop, memory device and computer system using same Oct 8, 2002 Issued
Array ( [id] => 1303555 [patent_doc_number] => 06624682 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'Method and an apparatus to actively sink current in an integrated circuit with a floating I/O supply voltage' [patent_app_type] => B1 [patent_app_number] => 10/267563 [patent_app_country] => US [patent_app_date] => 2002-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1550 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/624/06624682.pdf [firstpage_image] =>[orig_patent_app_number] => 10267563 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/267563
Method and an apparatus to actively sink current in an integrated circuit with a floating I/O supply voltage Oct 8, 2002 Issued
Array ( [id] => 7632512 [patent_doc_number] => 06664822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-16 [patent_title] => 'Driving device having dummy circuit' [patent_app_type] => B2 [patent_app_number] => 10/265685 [patent_app_country] => US [patent_app_date] => 2002-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 10380 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/664/06664822.pdf [firstpage_image] =>[orig_patent_app_number] => 10265685 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/265685
Driving device having dummy circuit Oct 7, 2002 Issued
Array ( [id] => 1289596 [patent_doc_number] => 06639434 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-28 [patent_title] => 'Low voltage differential signaling systems and methods' [patent_app_type] => B1 [patent_app_number] => 10/266361 [patent_app_country] => US [patent_app_date] => 2002-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4034 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/639/06639434.pdf [firstpage_image] =>[orig_patent_app_number] => 10266361 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/266361
Low voltage differential signaling systems and methods Oct 6, 2002 Issued
Array ( [id] => 1081691 [patent_doc_number] => 06836168 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-28 [patent_title] => 'Line driver with programmable slew rates' [patent_app_type] => B1 [patent_app_number] => 10/264204 [patent_app_country] => US [patent_app_date] => 2002-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4607 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/836/06836168.pdf [firstpage_image] =>[orig_patent_app_number] => 10264204 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/264204
Line driver with programmable slew rates Oct 1, 2002 Issued
Array ( [id] => 1222440 [patent_doc_number] => 06703873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-09 [patent_title] => 'Pull-up circuit for input/output terminals of electronic appliances' [patent_app_type] => B2 [patent_app_number] => 10/263337 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2286 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/703/06703873.pdf [firstpage_image] =>[orig_patent_app_number] => 10263337 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/263337
Pull-up circuit for input/output terminals of electronic appliances Sep 30, 2002 Issued
Array ( [id] => 6837465 [patent_doc_number] => 20030034805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'Regenerative signal level converter' [patent_app_type] => new [patent_app_number] => 10/263259 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2388 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20030034805.pdf [firstpage_image] =>[orig_patent_app_number] => 10263259 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/263259
Regenerative signal level converter Sep 30, 2002 Abandoned
Array ( [id] => 1277981 [patent_doc_number] => 06650168 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-18 [patent_title] => 'High-speed level shifter using zero-threshold MOSFETS' [patent_app_type] => B1 [patent_app_number] => 10/261344 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4268 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/650/06650168.pdf [firstpage_image] =>[orig_patent_app_number] => 10261344 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/261344
High-speed level shifter using zero-threshold MOSFETS Sep 29, 2002 Issued
Array ( [id] => 1159926 [patent_doc_number] => 06765423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-20 [patent_title] => 'Semiconductor circuit having clock synchronous receiver circuit' [patent_app_type] => B2 [patent_app_number] => 10/259775 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 16090 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765423.pdf [firstpage_image] =>[orig_patent_app_number] => 10259775 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/259775
Semiconductor circuit having clock synchronous receiver circuit Sep 29, 2002 Issued
Array ( [id] => 1064085 [patent_doc_number] => 06850099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-01 [patent_title] => 'Scalable driver device and related integrated circuit' [patent_app_type] => utility [patent_app_number] => 10/261200 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4451 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/850/06850099.pdf [firstpage_image] =>[orig_patent_app_number] => 10261200 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/261200
Scalable driver device and related integrated circuit Sep 29, 2002 Issued
Array ( [id] => 1207506 [patent_doc_number] => 06717444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'Low power latch sense amplifier' [patent_app_type] => B2 [patent_app_number] => 10/259489 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3374 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/717/06717444.pdf [firstpage_image] =>[orig_patent_app_number] => 10259489 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/259489
Low power latch sense amplifier Sep 29, 2002 Issued
Array ( [id] => 1182895 [patent_doc_number] => 06741112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-25 [patent_title] => 'Input circuit with hysteresis' [patent_app_type] => B2 [patent_app_number] => 10/255577 [patent_app_country] => US [patent_app_date] => 2002-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2839 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/741/06741112.pdf [firstpage_image] =>[orig_patent_app_number] => 10255577 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/255577
Input circuit with hysteresis Sep 26, 2002 Issued
Array ( [id] => 7268182 [patent_doc_number] => 20040056700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'SSTL PULL-DOWN PRE-DRIVER DESIGN USING REGULATED POWER SUPPLY' [patent_app_type] => new [patent_app_number] => 10/247127 [patent_app_country] => US [patent_app_date] => 2002-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2745 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20040056700.pdf [firstpage_image] =>[orig_patent_app_number] => 10247127 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/247127
SSTL pull-down pre-driver design using regulated power supply Sep 18, 2002 Issued
Array ( [id] => 1177074 [patent_doc_number] => 06750688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Semiconductor integrated circuit device and delay-locked loop device' [patent_app_type] => B2 [patent_app_number] => 10/242067 [patent_app_country] => US [patent_app_date] => 2002-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 16445 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/750/06750688.pdf [firstpage_image] =>[orig_patent_app_number] => 10242067 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/242067
Semiconductor integrated circuit device and delay-locked loop device Sep 11, 2002 Issued
Array ( [id] => 6753881 [patent_doc_number] => 20030001657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'LED lamp package for packaging an LED driver with an LED' [patent_app_type] => new [patent_app_number] => 10/233856 [patent_app_country] => US [patent_app_date] => 2002-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4332 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20030001657.pdf [firstpage_image] =>[orig_patent_app_number] => 10233856 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/233856
LED lamp package for packaging an LED driver with an LED Sep 2, 2002 Issued
Array ( [id] => 6748421 [patent_doc_number] => 20030042941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-06 [patent_title] => 'Programmable high speed I/O interface' [patent_app_type] => new [patent_app_number] => 10/229342 [patent_app_country] => US [patent_app_date] => 2002-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10397 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20030042941.pdf [firstpage_image] =>[orig_patent_app_number] => 10229342 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/229342
Programmable high speed I/O interface Aug 25, 2002 Issued
Array ( [id] => 1249291 [patent_doc_number] => 06674315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-06 [patent_title] => 'Clock signal generation device' [patent_app_type] => B2 [patent_app_number] => 10/223299 [patent_app_country] => US [patent_app_date] => 2002-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12234 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/674/06674315.pdf [firstpage_image] =>[orig_patent_app_number] => 10223299 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/223299
Clock signal generation device Aug 19, 2002 Issued
Array ( [id] => 1179742 [patent_doc_number] => 06747504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-08 [patent_title] => 'Controlled rise time output driver' [patent_app_type] => B2 [patent_app_number] => 10/223282 [patent_app_country] => US [patent_app_date] => 2002-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4254 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/747/06747504.pdf [firstpage_image] =>[orig_patent_app_number] => 10223282 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/223282
Controlled rise time output driver Aug 18, 2002 Issued
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