
My Trang Ton
Examiner (ID: 9286)
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2816, 2504, 3992 |
| Total Applications | 1495 |
| Issued Applications | 1343 |
| Pending Applications | 84 |
| Abandoned Applications | 72 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1182895
[patent_doc_number] => 06741112
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-05-25
[patent_title] => 'Input circuit with hysteresis'
[patent_app_type] => B2
[patent_app_number] => 10/255577
[patent_app_country] => US
[patent_app_date] => 2002-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2839
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/741/06741112.pdf
[firstpage_image] =>[orig_patent_app_number] => 10255577
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/255577 | Input circuit with hysteresis | Sep 26, 2002 | Issued |
Array
(
[id] => 7268182
[patent_doc_number] => 20040056700
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-25
[patent_title] => 'SSTL PULL-DOWN PRE-DRIVER DESIGN USING REGULATED POWER SUPPLY'
[patent_app_type] => new
[patent_app_number] => 10/247127
[patent_app_country] => US
[patent_app_date] => 2002-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2745
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0056/20040056700.pdf
[firstpage_image] =>[orig_patent_app_number] => 10247127
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/247127 | SSTL pull-down pre-driver design using regulated power supply | Sep 18, 2002 | Issued |
Array
(
[id] => 1177074
[patent_doc_number] => 06750688
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-06-15
[patent_title] => 'Semiconductor integrated circuit device and delay-locked loop device'
[patent_app_type] => B2
[patent_app_number] => 10/242067
[patent_app_country] => US
[patent_app_date] => 2002-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 25
[patent_no_of_words] => 16445
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/750/06750688.pdf
[firstpage_image] =>[orig_patent_app_number] => 10242067
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/242067 | Semiconductor integrated circuit device and delay-locked loop device | Sep 11, 2002 | Issued |
Array
(
[id] => 6753881
[patent_doc_number] => 20030001657
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-02
[patent_title] => 'LED lamp package for packaging an LED driver with an LED'
[patent_app_type] => new
[patent_app_number] => 10/233856
[patent_app_country] => US
[patent_app_date] => 2002-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4332
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20030001657.pdf
[firstpage_image] =>[orig_patent_app_number] => 10233856
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/233856 | LED lamp package for packaging an LED driver with an LED | Sep 2, 2002 | Issued |
Array
(
[id] => 6748421
[patent_doc_number] => 20030042941
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-06
[patent_title] => 'Programmable high speed I/O interface'
[patent_app_type] => new
[patent_app_number] => 10/229342
[patent_app_country] => US
[patent_app_date] => 2002-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 10397
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0042/20030042941.pdf
[firstpage_image] =>[orig_patent_app_number] => 10229342
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/229342 | Programmable high speed I/O interface | Aug 25, 2002 | Issued |
Array
(
[id] => 1249291
[patent_doc_number] => 06674315
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-01-06
[patent_title] => 'Clock signal generation device'
[patent_app_type] => B2
[patent_app_number] => 10/223299
[patent_app_country] => US
[patent_app_date] => 2002-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 12234
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/674/06674315.pdf
[firstpage_image] =>[orig_patent_app_number] => 10223299
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/223299 | Clock signal generation device | Aug 19, 2002 | Issued |
Array
(
[id] => 6691232
[patent_doc_number] => 20030038664
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-27
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => new
[patent_app_number] => 10/222906
[patent_app_country] => US
[patent_app_date] => 2002-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 13108
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0038/20030038664.pdf
[firstpage_image] =>[orig_patent_app_number] => 10222906
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/222906 | Semiconductor integrated circuit having reduced crosstalk interference on clock signals | Aug 18, 2002 | Issued |
Array
(
[id] => 1179742
[patent_doc_number] => 06747504
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-06-08
[patent_title] => 'Controlled rise time output driver'
[patent_app_type] => B2
[patent_app_number] => 10/223282
[patent_app_country] => US
[patent_app_date] => 2002-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 4254
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/747/06747504.pdf
[firstpage_image] =>[orig_patent_app_number] => 10223282
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/223282 | Controlled rise time output driver | Aug 18, 2002 | Issued |
Array
(
[id] => 1285741
[patent_doc_number] => 06642786
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-11-04
[patent_title] => 'Piecewise polynomial predistortion method and apparatus for compensating nonlinear distortion of high power amplifier'
[patent_app_type] => B1
[patent_app_number] => 10/222629
[patent_app_country] => US
[patent_app_date] => 2002-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5521
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/642/06642786.pdf
[firstpage_image] =>[orig_patent_app_number] => 10222629
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/222629 | Piecewise polynomial predistortion method and apparatus for compensating nonlinear distortion of high power amplifier | Aug 14, 2002 | Issued |
Array
(
[id] => 6718682
[patent_doc_number] => 20030052369
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-20
[patent_title] => 'Semiconductor output circuit device'
[patent_app_type] => new
[patent_app_number] => 10/218517
[patent_app_country] => US
[patent_app_date] => 2002-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 11404
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0052/20030052369.pdf
[firstpage_image] =>[orig_patent_app_number] => 10218517
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/218517 | Semiconductor output circuit device | Aug 14, 2002 | Issued |
Array
(
[id] => 6748434
[patent_doc_number] => 20030042954
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-06
[patent_title] => 'Digital wave generating apparatus'
[patent_app_type] => new
[patent_app_number] => 10/214708
[patent_app_country] => US
[patent_app_date] => 2002-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2703
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0042/20030042954.pdf
[firstpage_image] =>[orig_patent_app_number] => 10214708
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/214708 | Digital wave generating apparatus and the method thereof | Aug 8, 2002 | Issued |
Array
(
[id] => 1267147
[patent_doc_number] => 06661287
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-12-09
[patent_title] => 'Automatic gain control circuit and control method'
[patent_app_type] => B2
[patent_app_number] => 10/215607
[patent_app_country] => US
[patent_app_date] => 2002-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 3178
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/661/06661287.pdf
[firstpage_image] =>[orig_patent_app_number] => 10215607
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/215607 | Automatic gain control circuit and control method | Aug 7, 2002 | Issued |
Array
(
[id] => 6816398
[patent_doc_number] => 20030067356
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-10
[patent_title] => 'Recording clock generation circuit'
[patent_app_type] => new
[patent_app_number] => 10/215159
[patent_app_country] => US
[patent_app_date] => 2002-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2211
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0067/20030067356.pdf
[firstpage_image] =>[orig_patent_app_number] => 10215159
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/215159 | Recording clock generation circuit | Aug 7, 2002 | Issued |
Array
(
[id] => 1254914
[patent_doc_number] => 06670848
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-12-30
[patent_title] => 'Method and system for implementing autonomous automatic gain control in a low noise broadband distribution amplifier'
[patent_app_type] => B2
[patent_app_number] => 10/214327
[patent_app_country] => US
[patent_app_date] => 2002-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 11434
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/670/06670848.pdf
[firstpage_image] =>[orig_patent_app_number] => 10214327
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/214327 | Method and system for implementing autonomous automatic gain control in a low noise broadband distribution amplifier | Aug 7, 2002 | Issued |
Array
(
[id] => 1277962
[patent_doc_number] => 06650163
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-11-18
[patent_title] => 'Clock generator for integrated circuit'
[patent_app_type] => B1
[patent_app_number] => 10/216618
[patent_app_country] => US
[patent_app_date] => 2002-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2834
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/650/06650163.pdf
[firstpage_image] =>[orig_patent_app_number] => 10216618
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/216618 | Clock generator for integrated circuit | Aug 7, 2002 | Issued |
Array
(
[id] => 6837503
[patent_doc_number] => 20030034843
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-20
[patent_title] => 'System and method for activating gain stages in an amplification module'
[patent_app_type] => new
[patent_app_number] => 10/214092
[patent_app_country] => US
[patent_app_date] => 2002-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 11572
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0034/20030034843.pdf
[firstpage_image] =>[orig_patent_app_number] => 10214092
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/214092 | System and method for activating gain stages in an amplification module | Aug 7, 2002 | Issued |
Array
(
[id] => 7371079
[patent_doc_number] => 20040027205
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-02-12
[patent_title] => 'Local oscillator apparatus for low-noise generation of arbitrary frequencies'
[patent_app_type] => new
[patent_app_number] => 10/212774
[patent_app_country] => US
[patent_app_date] => 2002-08-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2002
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0027/20040027205.pdf
[firstpage_image] =>[orig_patent_app_number] => 10212774
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/212774 | Local oscillator apparatus for low-noise generation of arbitrary frequencies | Aug 6, 2002 | Abandoned |
Array
(
[id] => 1278134
[patent_doc_number] => 06650191
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-11-18
[patent_title] => 'Low jitter ring oscillator architecture'
[patent_app_type] => B2
[patent_app_number] => 10/213859
[patent_app_country] => US
[patent_app_date] => 2002-08-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 11
[patent_no_of_words] => 2997
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/650/06650191.pdf
[firstpage_image] =>[orig_patent_app_number] => 10213859
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/213859 | Low jitter ring oscillator architecture | Aug 6, 2002 | Issued |
Array
(
[id] => 1282395
[patent_doc_number] => 06646502
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-11-11
[patent_title] => 'Digital-input class-D amplifier'
[patent_app_type] => B1
[patent_app_number] => 10/212904
[patent_app_country] => US
[patent_app_date] => 2002-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 3967
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/646/06646502.pdf
[firstpage_image] =>[orig_patent_app_number] => 10212904
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/212904 | Digital-input class-D amplifier | Aug 5, 2002 | Issued |
Array
(
[id] => 6812144
[patent_doc_number] => 20030071694
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-17
[patent_title] => 'Voltage-controlled oscillation circuit'
[patent_app_type] => new
[patent_app_number] => 10/212168
[patent_app_country] => US
[patent_app_date] => 2002-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 7660
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0071/20030071694.pdf
[firstpage_image] =>[orig_patent_app_number] => 10212168
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/212168 | Voltage-controlled oscillation circuit | Aug 5, 2002 | Issued |