
My Trang Ton
Examiner (ID: 3916, Phone: (571)272-1754 , Office: P/3992 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 3992, 2816, 2504 |
| Total Applications | 1512 |
| Issued Applications | 1345 |
| Pending Applications | 95 |
| Abandoned Applications | 73 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6013001
[patent_doc_number] => 20020101278
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-01
[patent_title] => 'Digitally controlled impedance for I/O of an integrated circuit device'
[patent_app_type] => new
[patent_app_number] => 10/007167
[patent_app_country] => US
[patent_app_date] => 2001-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 11333
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0101/20020101278.pdf
[firstpage_image] =>[orig_patent_app_number] => 10007167
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/007167 | Digitally controlled impedance for I/O of an integrated circuit device | Nov 29, 2001 | Issued |
Array
(
[id] => 1456283
[patent_doc_number] => 06462607
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-08
[patent_title] => 'Ramp loading circuit for reducing current surges'
[patent_app_type] => B1
[patent_app_number] => 09/995640
[patent_app_country] => US
[patent_app_date] => 2001-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3229
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/462/06462607.pdf
[firstpage_image] =>[orig_patent_app_number] => 09995640
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/995640 | Ramp loading circuit for reducing current surges | Nov 28, 2001 | Issued |
Array
(
[id] => 1571659
[patent_doc_number] => 06498521
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-12-24
[patent_title] => 'Dynamic supply control for line driver'
[patent_app_type] => B1
[patent_app_number] => 09/998671
[patent_app_country] => US
[patent_app_date] => 2001-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 33
[patent_no_of_words] => 13884
[patent_no_of_claims] => 80
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/498/06498521.pdf
[firstpage_image] =>[orig_patent_app_number] => 09998671
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/998671 | Dynamic supply control for line driver | Nov 28, 2001 | Issued |
Array
(
[id] => 1410078
[patent_doc_number] => 06538485
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-03-25
[patent_title] => 'Dual tristate path output buffer control'
[patent_app_type] => B1
[patent_app_number] => 09/997130
[patent_app_country] => US
[patent_app_date] => 2001-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3576
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/538/06538485.pdf
[firstpage_image] =>[orig_patent_app_number] => 09997130
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/997130 | Dual tristate path output buffer control | Nov 28, 2001 | Issued |
Array
(
[id] => 1562532
[patent_doc_number] => 06437612
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-20
[patent_title] => 'Inductor-less RF/IF CMOS buffer for 50 off-chip load driving'
[patent_app_type] => B1
[patent_app_number] => 09/996287
[patent_app_country] => US
[patent_app_date] => 2001-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3860
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/437/06437612.pdf
[firstpage_image] =>[orig_patent_app_number] => 09996287
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/996287 | Inductor-less RF/IF CMOS buffer for 50 off-chip load driving | Nov 27, 2001 | Issued |
Array
(
[id] => 1421652
[patent_doc_number] => 06525590
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-02-25
[patent_title] => 'Spatially redundant and complementary semiconductor device-based, single event transient-resistant linear amplifier circuit architecture'
[patent_app_type] => B2
[patent_app_number] => 09/996448
[patent_app_country] => US
[patent_app_date] => 2001-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 4581
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/525/06525590.pdf
[firstpage_image] =>[orig_patent_app_number] => 09996448
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/996448 | Spatially redundant and complementary semiconductor device-based, single event transient-resistant linear amplifier circuit architecture | Nov 27, 2001 | Issued |
Array
(
[id] => 6859288
[patent_doc_number] => 20030090296
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-15
[patent_title] => 'Apparatus for ensuring correct start-up and phase locking of delay locked loop'
[patent_app_type] => new
[patent_app_number] => 10/012831
[patent_app_country] => US
[patent_app_date] => 2001-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 7271
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0090/20030090296.pdf
[firstpage_image] =>[orig_patent_app_number] => 10012831
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/012831 | Apparatus for ensuring correct start-up and phase locking of delay locked loop | Nov 12, 2001 | Issued |
Array
(
[id] => 1580990
[patent_doc_number] => 06448830
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-10
[patent_title] => 'Single-stage tri-state Schmitt trigger'
[patent_app_type] => B1
[patent_app_number] => 10/007854
[patent_app_country] => US
[patent_app_date] => 2001-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2771
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/448/06448830.pdf
[firstpage_image] =>[orig_patent_app_number] => 10007854
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/007854 | Single-stage tri-state Schmitt trigger | Nov 4, 2001 | Issued |
Array
(
[id] => 1562590
[patent_doc_number] => 06437628
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-20
[patent_title] => 'Differential level shifting buffer'
[patent_app_type] => B1
[patent_app_number] => 10/011363
[patent_app_country] => US
[patent_app_date] => 2001-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 4277
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/437/06437628.pdf
[firstpage_image] =>[orig_patent_app_number] => 10011363
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/011363 | Differential level shifting buffer | Nov 4, 2001 | Issued |
Array
(
[id] => 1583743
[patent_doc_number] => 06424210
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-07-23
[patent_title] => 'Isolator circuit'
[patent_app_type] => B1
[patent_app_number] => 09/985438
[patent_app_country] => US
[patent_app_date] => 2001-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3111
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/424/06424210.pdf
[firstpage_image] =>[orig_patent_app_number] => 09985438
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/985438 | Isolator circuit | Nov 1, 2001 | Issued |
Array
(
[id] => 1562528
[patent_doc_number] => 06437611
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-20
[patent_title] => 'MOS output driver circuit with linear I/V characteristics'
[patent_app_type] => B1
[patent_app_number] => 09/984405
[patent_app_country] => US
[patent_app_date] => 2001-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 2496
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 272
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/437/06437611.pdf
[firstpage_image] =>[orig_patent_app_number] => 09984405
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/984405 | MOS output driver circuit with linear I/V characteristics | Oct 29, 2001 | Issued |
Array
(
[id] => 7645062
[patent_doc_number] => 06472911
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-29
[patent_title] => 'Output buffer circuit of semiconductor integrated circuit'
[patent_app_type] => B1
[patent_app_number] => 09/984384
[patent_app_country] => US
[patent_app_date] => 2001-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 7152
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 11
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/472/06472911.pdf
[firstpage_image] =>[orig_patent_app_number] => 09984384
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/984384 | Output buffer circuit of semiconductor integrated circuit | Oct 29, 2001 | Issued |
Array
(
[id] => 6092668
[patent_doc_number] => 20020050843
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-05-02
[patent_title] => 'Current sense ampifier circuits contanining latches for improving stability and ampilification in semiconductor devices'
[patent_app_type] => new
[patent_app_number] => 09/999650
[patent_app_country] => US
[patent_app_date] => 2001-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4973
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0050/20020050843.pdf
[firstpage_image] =>[orig_patent_app_number] => 09999650
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/999650 | Current sense amplifier circuits containing latches for improving stability and amplification in semiconductor devices | Oct 29, 2001 | Issued |
Array
(
[id] => 6092666
[patent_doc_number] => 20020050842
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-05-02
[patent_title] => 'Apparatus for detecting edges of input signal to execute signal processing on the basic of edge timings'
[patent_app_type] => new
[patent_app_number] => 10/002059
[patent_app_country] => US
[patent_app_date] => 2001-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 8799
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0050/20020050842.pdf
[firstpage_image] =>[orig_patent_app_number] => 10002059
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/002059 | Apparatus for detecting edges of input signal to execute signal processing on the basis of edge timings | Oct 25, 2001 | Issued |
Array
(
[id] => 6092682
[patent_doc_number] => 20020050850
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-05-02
[patent_title] => 'Voltage switching circuit'
[patent_app_type] => new
[patent_app_number] => 09/983952
[patent_app_country] => US
[patent_app_date] => 2001-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7336
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0050/20020050850.pdf
[firstpage_image] =>[orig_patent_app_number] => 09983952
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/983952 | Voltage switching circuit | Oct 25, 2001 | Issued |
Array
(
[id] => 7643321
[patent_doc_number] => 06429721
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-06
[patent_title] => 'Mixer with stepped gain and constant common mode DC output bias voltage'
[patent_app_type] => B1
[patent_app_number] => 10/033158
[patent_app_country] => US
[patent_app_date] => 2001-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4388
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 4
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/429/06429721.pdf
[firstpage_image] =>[orig_patent_app_number] => 10033158
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/033158 | Mixer with stepped gain and constant common mode DC output bias voltage | Oct 24, 2001 | Issued |
Array
(
[id] => 1469104
[patent_doc_number] => 06459324
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-01
[patent_title] => 'Gate drive circuit with feedback-controlled active resistance'
[patent_app_type] => B1
[patent_app_number] => 09/983197
[patent_app_country] => US
[patent_app_date] => 2001-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 19
[patent_no_of_words] => 5163
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/459/06459324.pdf
[firstpage_image] =>[orig_patent_app_number] => 09983197
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/983197 | Gate drive circuit with feedback-controlled active resistance | Oct 22, 2001 | Issued |
Array
(
[id] => 5871744
[patent_doc_number] => 20020047729
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-25
[patent_title] => 'Voltage level detection circuit and voltage level detection method'
[patent_app_type] => new
[patent_app_number] => 09/978676
[patent_app_country] => US
[patent_app_date] => 2001-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4775
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0047/20020047729.pdf
[firstpage_image] =>[orig_patent_app_number] => 09978676
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/978676 | Voltage level detection circuit and voltage level detection method | Oct 17, 2001 | Issued |
Array
(
[id] => 5871753
[patent_doc_number] => 20020047734
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-25
[patent_title] => 'Driving circuit for a voice coil motor and driving method thereof'
[patent_app_type] => new
[patent_app_number] => 09/972750
[patent_app_country] => US
[patent_app_date] => 2001-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1995
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0047/20020047734.pdf
[firstpage_image] =>[orig_patent_app_number] => 09972750
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/972750 | Driving circuit for a voice coil motor and driving method thereof | Oct 4, 2001 | Issued |
Array
(
[id] => 1591743
[patent_doc_number] => 06483356
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-11-19
[patent_title] => 'Sinusoidal signal generating circuit providing small phase difference with respect to reference signal and apparatus for driving oscillating element with circuit'
[patent_app_type] => B2
[patent_app_number] => 09/966573
[patent_app_country] => US
[patent_app_date] => 2001-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 7294
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/483/06483356.pdf
[firstpage_image] =>[orig_patent_app_number] => 09966573
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/966573 | Sinusoidal signal generating circuit providing small phase difference with respect to reference signal and apparatus for driving oscillating element with circuit | Sep 25, 2001 | Issued |