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Examiner (ID: 3916, Phone: (571)272-1754 , Office: P/3992 )

Most Active Art Unit
2816
Art Unit(s)
3992, 2816, 2504
Total Applications
1512
Issued Applications
1345
Pending Applications
95
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4416188 [patent_doc_number] => 06265931 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Voltage reference source for an overvoltage-tolerant bus interface' [patent_app_type] => 1 [patent_app_number] => 9/544962 [patent_app_country] => US [patent_app_date] => 2000-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2965 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/265/06265931.pdf [firstpage_image] =>[orig_patent_app_number] => 544962 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/544962
Voltage reference source for an overvoltage-tolerant bus interface Apr 6, 2000 Issued
Array ( [id] => 4375704 [patent_doc_number] => 06275076 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Sample-and-hold device using complementary bipolar technology' [patent_app_type] => 1 [patent_app_number] => 9/526200 [patent_app_country] => US [patent_app_date] => 2000-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 7710 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/275/06275076.pdf [firstpage_image] =>[orig_patent_app_number] => 526200 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/526200
Sample-and-hold device using complementary bipolar technology Mar 14, 2000 Issued
Array ( [id] => 4326862 [patent_doc_number] => 06249171 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Method and apparatus for galvanically isolating two integrated circuits from each other' [patent_app_type] => 1 [patent_app_number] => 9/503598 [patent_app_country] => US [patent_app_date] => 2000-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 5700 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249171.pdf [firstpage_image] =>[orig_patent_app_number] => 503598 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/503598
Method and apparatus for galvanically isolating two integrated circuits from each other Feb 10, 2000 Issued
Array ( [id] => 7643346 [patent_doc_number] => 06429696 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Peak hold and calibration circuit' [patent_app_type] => B1 [patent_app_number] => 09/500098 [patent_app_country] => US [patent_app_date] => 2000-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6578 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429696.pdf [firstpage_image] =>[orig_patent_app_number] => 09500098 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/500098
Peak hold and calibration circuit Feb 7, 2000 Issued
Array ( [id] => 1098077 [patent_doc_number] => 06822505 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-23 [patent_title] => 'Mobility compensation in MOS integrated circuits' [patent_app_type] => B1 [patent_app_number] => 09/472702 [patent_app_country] => US [patent_app_date] => 1999-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4740 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/822/06822505.pdf [firstpage_image] =>[orig_patent_app_number] => 09472702 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/472702
Mobility compensation in MOS integrated circuits Dec 26, 1999 Issued
Array ( [id] => 1492254 [patent_doc_number] => 06417699 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Comparator circuits' [patent_app_type] => B1 [patent_app_number] => 09/466374 [patent_app_country] => US [patent_app_date] => 1999-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6248 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/417/06417699.pdf [firstpage_image] =>[orig_patent_app_number] => 09466374 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/466374
Comparator circuits Dec 16, 1999 Issued
Array ( [id] => 1551362 [patent_doc_number] => 06346846 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Methods and apparatus for blowing and sensing antifuses' [patent_app_type] => B1 [patent_app_number] => 09/466479 [patent_app_country] => US [patent_app_date] => 1999-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 9086 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/346/06346846.pdf [firstpage_image] =>[orig_patent_app_number] => 09466479 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/466479
Methods and apparatus for blowing and sensing antifuses Dec 16, 1999 Issued
Array ( [id] => 1569184 [patent_doc_number] => 06377099 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'Static clock pulse generator, spatial light modulator and display' [patent_app_type] => B1 [patent_app_number] => 09/464155 [patent_app_country] => US [patent_app_date] => 1999-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 41 [patent_no_of_words] => 11604 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/377/06377099.pdf [firstpage_image] =>[orig_patent_app_number] => 09464155 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/464155
Static clock pulse generator, spatial light modulator and display Dec 15, 1999 Issued
Array ( [id] => 4415965 [patent_doc_number] => 06265909 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Three-valued switching circuit' [patent_app_type] => 1 [patent_app_number] => 9/464038 [patent_app_country] => US [patent_app_date] => 1999-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 5832 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/265/06265909.pdf [firstpage_image] =>[orig_patent_app_number] => 464038 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/464038
Three-valued switching circuit Dec 14, 1999 Issued
Array ( [id] => 4260136 [patent_doc_number] => 06208174 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'High-speed comparator systems and methods with enhanced noise rejection' [patent_app_type] => 1 [patent_app_number] => 9/461516 [patent_app_country] => US [patent_app_date] => 1999-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4063 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/208/06208174.pdf [firstpage_image] =>[orig_patent_app_number] => 461516 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/461516
High-speed comparator systems and methods with enhanced noise rejection Dec 13, 1999 Issued
Array ( [id] => 4375690 [patent_doc_number] => 06275075 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Current comparator' [patent_app_type] => 1 [patent_app_number] => 9/459462 [patent_app_country] => US [patent_app_date] => 1999-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3489 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/275/06275075.pdf [firstpage_image] =>[orig_patent_app_number] => 459462 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/459462
Current comparator Dec 12, 1999 Issued
Array ( [id] => 4339400 [patent_doc_number] => 06313682 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Pulse generation circuit and method with transmission pre-emphasis' [patent_app_type] => 1 [patent_app_number] => 9/457235 [patent_app_country] => US [patent_app_date] => 1999-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3538 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/313/06313682.pdf [firstpage_image] =>[orig_patent_app_number] => 457235 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/457235
Pulse generation circuit and method with transmission pre-emphasis Dec 7, 1999 Issued
Array ( [id] => 4339618 [patent_doc_number] => 06313696 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Differential buffer having common-mode rejection' [patent_app_type] => 1 [patent_app_number] => 9/457269 [patent_app_country] => US [patent_app_date] => 1999-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4553 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/313/06313696.pdf [firstpage_image] =>[orig_patent_app_number] => 457269 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/457269
Differential buffer having common-mode rejection Dec 7, 1999 Issued
Array ( [id] => 4280436 [patent_doc_number] => 06323696 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Sample and hold circuit' [patent_app_type] => 1 [patent_app_number] => 9/456359 [patent_app_country] => US [patent_app_date] => 1999-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2606 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/323/06323696.pdf [firstpage_image] =>[orig_patent_app_number] => 456359 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/456359
Sample and hold circuit Dec 6, 1999 Issued
Array ( [id] => 1481508 [patent_doc_number] => 06452435 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Method and apparatus for scanning and clocking chips with a high-speed free running clock in a manufacturing test environment' [patent_app_type] => B1 [patent_app_number] => 09/436112 [patent_app_country] => US [patent_app_date] => 1999-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4219 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/452/06452435.pdf [firstpage_image] =>[orig_patent_app_number] => 09436112 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/436112
Method and apparatus for scanning and clocking chips with a high-speed free running clock in a manufacturing test environment Nov 7, 1999 Issued
Array ( [id] => 4375986 [patent_doc_number] => 06275095 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Semiconductor amplifier circuit' [patent_app_type] => 1 [patent_app_number] => 9/433050 [patent_app_country] => US [patent_app_date] => 1999-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4565 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/275/06275095.pdf [firstpage_image] =>[orig_patent_app_number] => 433050 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/433050
Semiconductor amplifier circuit Nov 2, 1999 Issued
Array ( [id] => 4303659 [patent_doc_number] => 06184730 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'CMOS output buffer with negative feedback dynamic-drive control and dual P,N active-termination transmission gates' [patent_app_type] => 1 [patent_app_number] => 9/432368 [patent_app_country] => US [patent_app_date] => 1999-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184730.pdf [firstpage_image] =>[orig_patent_app_number] => 432368 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/432368
CMOS output buffer with negative feedback dynamic-drive control and dual P,N active-termination transmission gates Nov 2, 1999 Issued
Array ( [id] => 4299803 [patent_doc_number] => 06236246 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'Voltage-mode boosting circuit for write driver' [patent_app_type] => 1 [patent_app_number] => 9/432951 [patent_app_country] => US [patent_app_date] => 1999-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2907 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/236/06236246.pdf [firstpage_image] =>[orig_patent_app_number] => 432951 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/432951
Voltage-mode boosting circuit for write driver Nov 2, 1999 Issued
Array ( [id] => 4392214 [patent_doc_number] => 06262620 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Driver circuitry for latching type valve and the like' [patent_app_type] => 1 [patent_app_number] => 9/431820 [patent_app_country] => US [patent_app_date] => 1999-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5612 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/262/06262620.pdf [firstpage_image] =>[orig_patent_app_number] => 431820 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/431820
Driver circuitry for latching type valve and the like Nov 1, 1999 Issued
Array ( [id] => 4326610 [patent_doc_number] => 06249156 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Electric circuit' [patent_app_type] => 1 [patent_app_number] => 9/431665 [patent_app_country] => US [patent_app_date] => 1999-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2531 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249156.pdf [firstpage_image] =>[orig_patent_app_number] => 431665 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/431665
Electric circuit Oct 31, 1999 Issued
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