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Examiner (ID: 3916, Phone: (571)272-1754 , Office: P/3992 )

Most Active Art Unit
2816
Art Unit(s)
3992, 2816, 2504
Total Applications
1512
Issued Applications
1345
Pending Applications
95
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4097123 [patent_doc_number] => 06133768 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Breakdown voltage compensation circuit for write driver transistors' [patent_app_type] => 1 [patent_app_number] => 9/292557 [patent_app_country] => US [patent_app_date] => 1999-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3900 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133768.pdf [firstpage_image] =>[orig_patent_app_number] => 292557 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/292557
Breakdown voltage compensation circuit for write driver transistors Apr 14, 1999 Issued
Array ( [id] => 4160858 [patent_doc_number] => 06124748 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Method and apparatus for improving ringback tolerance in an input receiver' [patent_app_type] => 1 [patent_app_number] => 9/289053 [patent_app_country] => US [patent_app_date] => 1999-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3283 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/124/06124748.pdf [firstpage_image] =>[orig_patent_app_number] => 289053 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/289053
Method and apparatus for improving ringback tolerance in an input receiver Apr 8, 1999 Issued
Array ( [id] => 4378883 [patent_doc_number] => 06288587 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'CMOS pulse shrinking delay element with deep subnanosecond resolution' [patent_app_type] => 1 [patent_app_number] => 9/287101 [patent_app_country] => US [patent_app_date] => 1999-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 4345 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/288/06288587.pdf [firstpage_image] =>[orig_patent_app_number] => 287101 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/287101
CMOS pulse shrinking delay element with deep subnanosecond resolution Apr 6, 1999 Issued
Array ( [id] => 4365404 [patent_doc_number] => 06169435 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Semiconductor integrated circuit device with built-in timing regulator for output signals' [patent_app_type] => 1 [patent_app_number] => 9/261742 [patent_app_country] => US [patent_app_date] => 1999-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6376 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169435.pdf [firstpage_image] =>[orig_patent_app_number] => 261742 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/261742
Semiconductor integrated circuit device with built-in timing regulator for output signals Mar 2, 1999 Issued
Array ( [id] => 4246252 [patent_doc_number] => 06166574 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Circuit for turning on and off a clock without a glitch' [patent_app_type] => 1 [patent_app_number] => 9/251718 [patent_app_country] => US [patent_app_date] => 1999-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3107 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166574.pdf [firstpage_image] =>[orig_patent_app_number] => 251718 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/251718
Circuit for turning on and off a clock without a glitch Feb 16, 1999 Issued
Array ( [id] => 4165534 [patent_doc_number] => 06114896 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Complementary multiplexer with low disabled-output capacitance, and method' [patent_app_type] => 1 [patent_app_number] => 9/247510 [patent_app_country] => US [patent_app_date] => 1999-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 1515 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/114/06114896.pdf [firstpage_image] =>[orig_patent_app_number] => 247510 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/247510
Complementary multiplexer with low disabled-output capacitance, and method Feb 9, 1999 Issued
Array ( [id] => 4110846 [patent_doc_number] => 06100727 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Noise-immune dynamic driving circuit capable of suppressing generation of a feedthrough current and increase of a delay' [patent_app_type] => 1 [patent_app_number] => 9/243755 [patent_app_country] => US [patent_app_date] => 1999-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 6328 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100727.pdf [firstpage_image] =>[orig_patent_app_number] => 243755 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/243755
Noise-immune dynamic driving circuit capable of suppressing generation of a feedthrough current and increase of a delay Feb 2, 1999 Issued
Array ( [id] => 4104226 [patent_doc_number] => 06097233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Adjustable delay circuit' [patent_app_type] => 1 [patent_app_number] => 9/228610 [patent_app_country] => US [patent_app_date] => 1999-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3111 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/097/06097233.pdf [firstpage_image] =>[orig_patent_app_number] => 228610 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/228610
Adjustable delay circuit Jan 11, 1999 Issued
Array ( [id] => 4255772 [patent_doc_number] => 06137321 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Linear sampling switch' [patent_app_type] => 1 [patent_app_number] => 9/228826 [patent_app_country] => US [patent_app_date] => 1999-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 6316 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 339 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/137/06137321.pdf [firstpage_image] =>[orig_patent_app_number] => 228826 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/228826
Linear sampling switch Jan 11, 1999 Issued
Array ( [id] => 4358014 [patent_doc_number] => 06215337 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Linear sampling switch' [patent_app_type] => 1 [patent_app_number] => 9/228827 [patent_app_country] => US [patent_app_date] => 1999-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 6357 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/215/06215337.pdf [firstpage_image] =>[orig_patent_app_number] => 228827 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/228827
Linear sampling switch Jan 11, 1999 Issued
Array ( [id] => 4165425 [patent_doc_number] => 06114889 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Phase locked loop for recovering clock' [patent_app_type] => 1 [patent_app_number] => 9/227860 [patent_app_country] => US [patent_app_date] => 1999-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 37 [patent_no_of_words] => 5217 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/114/06114889.pdf [firstpage_image] =>[orig_patent_app_number] => 227860 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/227860
Phase locked loop for recovering clock Jan 10, 1999 Issued
Array ( [id] => 4192599 [patent_doc_number] => 06160438 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Charge sharing selectors' [patent_app_type] => 1 [patent_app_number] => 9/227223 [patent_app_country] => US [patent_app_date] => 1999-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3158 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/160/06160438.pdf [firstpage_image] =>[orig_patent_app_number] => 227223 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/227223
Charge sharing selectors Jan 7, 1999 Issued
Array ( [id] => 4364463 [patent_doc_number] => 06175261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Fuse cell for on-chip trimming' [patent_app_type] => 1 [patent_app_number] => 9/226465 [patent_app_country] => US [patent_app_date] => 1999-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7752 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/175/06175261.pdf [firstpage_image] =>[orig_patent_app_number] => 226465 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/226465
Fuse cell for on-chip trimming Jan 6, 1999 Issued
Array ( [id] => 4165264 [patent_doc_number] => 06114879 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Phase detectors' [patent_app_type] => 1 [patent_app_number] => 9/226442 [patent_app_country] => US [patent_app_date] => 1999-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3011 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/114/06114879.pdf [firstpage_image] =>[orig_patent_app_number] => 226442 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/226442
Phase detectors Jan 5, 1999 Issued
Array ( [id] => 4413430 [patent_doc_number] => 06172538 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Universal pulse synchronizer' [patent_app_type] => 1 [patent_app_number] => 9/226924 [patent_app_country] => US [patent_app_date] => 1999-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3500 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172538.pdf [firstpage_image] =>[orig_patent_app_number] => 226924 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/226924
Universal pulse synchronizer Jan 5, 1999 Issued
Array ( [id] => 4416160 [patent_doc_number] => 06229363 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/224354 [patent_app_country] => US [patent_app_date] => 1999-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 39 [patent_no_of_words] => 25225 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/229/06229363.pdf [firstpage_image] =>[orig_patent_app_number] => 224354 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/224354
Semiconductor device Jan 3, 1999 Issued
Array ( [id] => 4267436 [patent_doc_number] => 06204713 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Method and apparatus for routing low-skew clock networks' [patent_app_type] => 1 [patent_app_number] => 9/224779 [patent_app_country] => US [patent_app_date] => 1999-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5556 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/204/06204713.pdf [firstpage_image] =>[orig_patent_app_number] => 224779 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/224779
Method and apparatus for routing low-skew clock networks Jan 3, 1999 Issued
Array ( [id] => 1492308 [patent_doc_number] => 06417717 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Hierarchical multiplexer for analog array readout' [patent_app_type] => B1 [patent_app_number] => 09/223874 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2322 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/417/06417717.pdf [firstpage_image] =>[orig_patent_app_number] => 09223874 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/223874
Hierarchical multiplexer for analog array readout Dec 30, 1998 Issued
Array ( [id] => 4424161 [patent_doc_number] => 06194954 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Voltage controlled generator for semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 9/221990 [patent_app_country] => US [patent_app_date] => 1998-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4342 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194954.pdf [firstpage_image] =>[orig_patent_app_number] => 221990 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/221990
Voltage controlled generator for semiconductor devices Dec 28, 1998 Issued
Array ( [id] => 4134851 [patent_doc_number] => 06127873 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Feedforward circuit structure with programmable zeros for providing programmable group delay of a wide signal band' [patent_app_type] => 1 [patent_app_number] => 9/221199 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1720 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/127/06127873.pdf [firstpage_image] =>[orig_patent_app_number] => 221199 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/221199
Feedforward circuit structure with programmable zeros for providing programmable group delay of a wide signal band Dec 22, 1998 Issued
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