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Examiner (ID: 3916, Phone: (571)272-1754 , Office: P/3992 )

Most Active Art Unit
2816
Art Unit(s)
3992, 2816, 2504
Total Applications
1512
Issued Applications
1345
Pending Applications
95
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4015296 [patent_doc_number] => 05889430 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Current mode transistor circuit' [patent_app_type] => 1 [patent_app_number] => 8/883222 [patent_app_country] => US [patent_app_date] => 1997-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6118 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/889/05889430.pdf [firstpage_image] =>[orig_patent_app_number] => 883222 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/883222
Current mode transistor circuit Jun 25, 1997 Issued
Array ( [id] => 3999971 [patent_doc_number] => 05892374 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Latching comparator with input offset adjustment' [patent_app_type] => 1 [patent_app_number] => 8/882861 [patent_app_country] => US [patent_app_date] => 1997-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3259 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/892/05892374.pdf [firstpage_image] =>[orig_patent_app_number] => 882861 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/882861
Latching comparator with input offset adjustment Jun 25, 1997 Issued
Array ( [id] => 4246413 [patent_doc_number] => 06166584 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Forward biased MOS circuits' [patent_app_type] => 1 [patent_app_number] => 8/880047 [patent_app_country] => US [patent_app_date] => 1997-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3545 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166584.pdf [firstpage_image] =>[orig_patent_app_number] => 880047 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/880047
Forward biased MOS circuits Jun 19, 1997 Issued
Array ( [id] => 3941191 [patent_doc_number] => 05939912 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Recovery circuit having long hold time and phase range' [patent_app_type] => 1 [patent_app_number] => 8/878160 [patent_app_country] => US [patent_app_date] => 1997-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6972 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/939/05939912.pdf [firstpage_image] =>[orig_patent_app_number] => 878160 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/878160
Recovery circuit having long hold time and phase range Jun 17, 1997 Issued
Array ( [id] => 4246492 [patent_doc_number] => 06091278 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Method and device for processing sampled analogue signals in digital BiCMOS process' [patent_app_type] => 1 [patent_app_number] => 8/876050 [patent_app_country] => US [patent_app_date] => 1997-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2155 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/091/06091278.pdf [firstpage_image] =>[orig_patent_app_number] => 876050 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/876050
Method and device for processing sampled analogue signals in digital BiCMOS process Jun 12, 1997 Issued
Array ( [id] => 4011375 [patent_doc_number] => 05859549 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Digital audio frame and block synchonization' [patent_app_type] => 1 [patent_app_number] => 8/874527 [patent_app_country] => US [patent_app_date] => 1997-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1706 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/859/05859549.pdf [firstpage_image] =>[orig_patent_app_number] => 874527 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/874527
Digital audio frame and block synchonization Jun 12, 1997 Issued
Array ( [id] => 3987208 [patent_doc_number] => 05949272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-07 [patent_title] => 'Bidirectional off-chip driver with receiver bypass' [patent_app_type] => 1 [patent_app_number] => 8/873830 [patent_app_country] => US [patent_app_date] => 1997-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2752 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/949/05949272.pdf [firstpage_image] =>[orig_patent_app_number] => 873830 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/873830
Bidirectional off-chip driver with receiver bypass Jun 11, 1997 Issued
Array ( [id] => 3931507 [patent_doc_number] => 05945861 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Clock signal modeling circuit with negative delay' [patent_app_type] => 1 [patent_app_number] => 8/873860 [patent_app_country] => US [patent_app_date] => 1997-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2375 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/945/05945861.pdf [firstpage_image] =>[orig_patent_app_number] => 873860 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/873860
Clock signal modeling circuit with negative delay Jun 11, 1997 Issued
Array ( [id] => 3942934 [patent_doc_number] => 05929667 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Method and apparatus for protecting circuits subjected to high voltage' [patent_app_type] => 1 [patent_app_number] => 8/872374 [patent_app_country] => US [patent_app_date] => 1997-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6830 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/929/05929667.pdf [firstpage_image] =>[orig_patent_app_number] => 872374 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/872374
Method and apparatus for protecting circuits subjected to high voltage Jun 9, 1997 Issued
Array ( [id] => 3847579 [patent_doc_number] => 05744985 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Differential sample-hold circuit' [patent_app_type] => 1 [patent_app_number] => 8/867760 [patent_app_country] => US [patent_app_date] => 1997-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3299 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/744/05744985.pdf [firstpage_image] =>[orig_patent_app_number] => 867760 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/867760
Differential sample-hold circuit Jun 2, 1997 Issued
Array ( [id] => 3963452 [patent_doc_number] => 05936448 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Integrated circuit having independently testable input-output circuits and test method therefor' [patent_app_type] => 1 [patent_app_number] => 8/864672 [patent_app_country] => US [patent_app_date] => 1997-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4378 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936448.pdf [firstpage_image] =>[orig_patent_app_number] => 864672 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/864672
Integrated circuit having independently testable input-output circuits and test method therefor May 27, 1997 Issued
Array ( [id] => 3860143 [patent_doc_number] => 05767736 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Charge pump having high switching speed and low switching noise' [patent_app_type] => 1 [patent_app_number] => 8/863930 [patent_app_country] => US [patent_app_date] => 1997-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4304 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/767/05767736.pdf [firstpage_image] =>[orig_patent_app_number] => 863930 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/863930
Charge pump having high switching speed and low switching noise May 26, 1997 Issued
Array ( [id] => 3966066 [patent_doc_number] => 05900760 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'Low voltage ECL latch and flip-flop' [patent_app_type] => 1 [patent_app_number] => 8/859018 [patent_app_country] => US [patent_app_date] => 1997-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5189 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/900/05900760.pdf [firstpage_image] =>[orig_patent_app_number] => 859018 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/859018
Low voltage ECL latch and flip-flop May 19, 1997 Issued
Array ( [id] => 3768729 [patent_doc_number] => 05844433 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Sample/hold circuit with current mirror circuits' [patent_app_type] => 1 [patent_app_number] => 8/859230 [patent_app_country] => US [patent_app_date] => 1997-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4553 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/844/05844433.pdf [firstpage_image] =>[orig_patent_app_number] => 859230 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/859230
Sample/hold circuit with current mirror circuits May 18, 1997 Issued
Array ( [id] => 3796488 [patent_doc_number] => 05841302 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Semiconductor integrated circuit for use as a two-modulus prescaler' [patent_app_type] => 1 [patent_app_number] => 8/855613 [patent_app_country] => US [patent_app_date] => 1997-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3301 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/841/05841302.pdf [firstpage_image] =>[orig_patent_app_number] => 855613 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/855613
Semiconductor integrated circuit for use as a two-modulus prescaler May 12, 1997 Issued
Array ( [id] => 4033576 [patent_doc_number] => 05903173 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-11 [patent_title] => 'Low side driver circuit with diagnostic output' [patent_app_type] => 1 [patent_app_number] => 8/854398 [patent_app_country] => US [patent_app_date] => 1997-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3207 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/903/05903173.pdf [firstpage_image] =>[orig_patent_app_number] => 854398 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/854398
Low side driver circuit with diagnostic output May 11, 1997 Issued
Array ( [id] => 3813007 [patent_doc_number] => 05854564 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-29 [patent_title] => 'Direct sensor interface (DSI) module' [patent_app_type] => 1 [patent_app_number] => 8/855868 [patent_app_country] => US [patent_app_date] => 1997-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4213 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/854/05854564.pdf [firstpage_image] =>[orig_patent_app_number] => 855868 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/855868
Direct sensor interface (DSI) module May 11, 1997 Issued
Array ( [id] => 3767483 [patent_doc_number] => 05852379 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-22 [patent_title] => 'Fuse tunable, RC-generated pulse generator' [patent_app_type] => 1 [patent_app_number] => 8/853406 [patent_app_country] => US [patent_app_date] => 1997-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4634 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 313 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/852/05852379.pdf [firstpage_image] =>[orig_patent_app_number] => 853406 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/853406
Fuse tunable, RC-generated pulse generator May 8, 1997 Issued
Array ( [id] => 4004893 [patent_doc_number] => 05923210 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'High side driver circuit with diagnostic output' [patent_app_type] => 1 [patent_app_number] => 8/852483 [patent_app_country] => US [patent_app_date] => 1997-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3644 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923210.pdf [firstpage_image] =>[orig_patent_app_number] => 852483 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/852483
High side driver circuit with diagnostic output May 6, 1997 Issued
Array ( [id] => 3992140 [patent_doc_number] => 05959493 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Totem pole driver circuit' [patent_app_type] => 1 [patent_app_number] => 8/851199 [patent_app_country] => US [patent_app_date] => 1997-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5243 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/959/05959493.pdf [firstpage_image] =>[orig_patent_app_number] => 851199 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/851199
Totem pole driver circuit May 4, 1997 Issued
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