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Examiner (ID: 3916, Phone: (571)272-1754 , Office: P/3992 )

Most Active Art Unit
2816
Art Unit(s)
3992, 2816, 2504
Total Applications
1512
Issued Applications
1345
Pending Applications
95
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3768670 [patent_doc_number] => 05844428 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Driver circuit for use with a sensing amplifier in a memory' [patent_app_type] => 1 [patent_app_number] => 8/850716 [patent_app_country] => US [patent_app_date] => 1997-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5879 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 411 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/844/05844428.pdf [firstpage_image] =>[orig_patent_app_number] => 850716 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/850716
Driver circuit for use with a sensing amplifier in a memory May 1, 1997 Issued
Array ( [id] => 4000888 [patent_doc_number] => 05920222 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Tunable pulse generator based on a wave pipeline' [patent_app_type] => 1 [patent_app_number] => 8/839219 [patent_app_country] => US [patent_app_date] => 1997-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 4487 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920222.pdf [firstpage_image] =>[orig_patent_app_number] => 839219 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/839219
Tunable pulse generator based on a wave pipeline Apr 21, 1997 Issued
Array ( [id] => 4023976 [patent_doc_number] => 05963356 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Scanning optical apparatus' [patent_app_type] => 1 [patent_app_number] => 8/844596 [patent_app_country] => US [patent_app_date] => 1997-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3317 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963356.pdf [firstpage_image] =>[orig_patent_app_number] => 844596 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/844596
Scanning optical apparatus Apr 20, 1997 Issued
Array ( [id] => 4040552 [patent_doc_number] => 05994926 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Circuit and method for programmably changing the transconductance of a transconductor circuit' [patent_app_type] => 1 [patent_app_number] => 8/838300 [patent_app_country] => US [patent_app_date] => 1997-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3561 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994926.pdf [firstpage_image] =>[orig_patent_app_number] => 838300 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/838300
Circuit and method for programmably changing the transconductance of a transconductor circuit Apr 15, 1997 Issued
Array ( [id] => 4375915 [patent_doc_number] => 06275090 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Adaptive resistor trimming circuit' [patent_app_type] => 1 [patent_app_number] => 9/176279 [patent_app_country] => US [patent_app_date] => 1997-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2403 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/275/06275090.pdf [firstpage_image] =>[orig_patent_app_number] => 176279 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/176279
Adaptive resistor trimming circuit Apr 8, 1997 Issued
Array ( [id] => 4160969 [patent_doc_number] => 06124756 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Method and apparatus for galvanically isolating two integrated circuits from each other' [patent_app_type] => 1 [patent_app_number] => 8/835888 [patent_app_country] => US [patent_app_date] => 1997-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5689 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/124/06124756.pdf [firstpage_image] =>[orig_patent_app_number] => 835888 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/835888
Method and apparatus for galvanically isolating two integrated circuits from each other Apr 7, 1997 Issued
Array ( [id] => 3982795 [patent_doc_number] => 05917365 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Optimizing the operating characteristics of a CMOS integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/825789 [patent_app_country] => US [patent_app_date] => 1997-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 6730 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917365.pdf [firstpage_image] =>[orig_patent_app_number] => 825789 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/825789
Optimizing the operating characteristics of a CMOS integrated circuit Apr 7, 1997 Issued
Array ( [id] => 4050296 [patent_doc_number] => 05874855 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-23 [patent_title] => 'Voltage transferring device capable of holding boost voltage and transferring in high speed boost voltage' [patent_app_type] => 1 [patent_app_number] => 8/834941 [patent_app_country] => US [patent_app_date] => 1997-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 7003 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/874/05874855.pdf [firstpage_image] =>[orig_patent_app_number] => 834941 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/834941
Voltage transferring device capable of holding boost voltage and transferring in high speed boost voltage Apr 6, 1997 Issued
Array ( [id] => 3768787 [patent_doc_number] => 05844437 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Differential flipflop circuit operating with a low voltage' [patent_app_type] => 1 [patent_app_number] => 8/825390 [patent_app_country] => US [patent_app_date] => 1997-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6894 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 681 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/844/05844437.pdf [firstpage_image] =>[orig_patent_app_number] => 825390 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/825390
Differential flipflop circuit operating with a low voltage Mar 27, 1997 Issued
Array ( [id] => 3956938 [patent_doc_number] => 05977806 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'PLL circuit with reduced response variance due to manufacturing variations' [patent_app_type] => 1 [patent_app_number] => 8/826124 [patent_app_country] => US [patent_app_date] => 1997-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4983 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/977/05977806.pdf [firstpage_image] =>[orig_patent_app_number] => 826124 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/826124
PLL circuit with reduced response variance due to manufacturing variations Mar 26, 1997 Issued
Array ( [id] => 4032455 [patent_doc_number] => 05883532 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Power-on reset circuit based upon FET threshold level' [patent_app_type] => 1 [patent_app_number] => 8/823647 [patent_app_country] => US [patent_app_date] => 1997-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4221 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/883/05883532.pdf [firstpage_image] =>[orig_patent_app_number] => 823647 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/823647
Power-on reset circuit based upon FET threshold level Mar 24, 1997 Issued
Array ( [id] => 4029035 [patent_doc_number] => 05926048 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Method and apparatus for synchronizing clock signals' [patent_app_type] => 1 [patent_app_number] => 8/823584 [patent_app_country] => US [patent_app_date] => 1997-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2597 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/926/05926048.pdf [firstpage_image] =>[orig_patent_app_number] => 823584 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/823584
Method and apparatus for synchronizing clock signals Mar 24, 1997 Issued
Array ( [id] => 3974903 [patent_doc_number] => 05886551 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-23 [patent_title] => 'Charge pump circuit for use in a phase locked loop' [patent_app_type] => 1 [patent_app_number] => 8/823681 [patent_app_country] => US [patent_app_date] => 1997-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 6199 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/886/05886551.pdf [firstpage_image] =>[orig_patent_app_number] => 823681 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/823681
Charge pump circuit for use in a phase locked loop Mar 24, 1997 Issued
Array ( [id] => 3942812 [patent_doc_number] => 05929659 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Circuit and process for sensing data' [patent_app_type] => 1 [patent_app_number] => 8/815526 [patent_app_country] => US [patent_app_date] => 1997-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5471 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/929/05929659.pdf [firstpage_image] =>[orig_patent_app_number] => 815526 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/815526
Circuit and process for sensing data Mar 11, 1997 Issued
Array ( [id] => 3998369 [patent_doc_number] => 05892267 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Multi-stage voltage-boosting circuit with boosted back-gate bias' [patent_app_type] => 1 [patent_app_number] => 8/812923 [patent_app_country] => US [patent_app_date] => 1997-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 1 [patent_no_of_words] => 4679 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/892/05892267.pdf [firstpage_image] =>[orig_patent_app_number] => 812923 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/812923
Multi-stage voltage-boosting circuit with boosted back-gate bias Mar 9, 1997 Issued
Array ( [id] => 4092802 [patent_doc_number] => 06018256 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'Output circuit and electronic apparatus using the same' [patent_app_type] => 1 [patent_app_number] => 8/809895 [patent_app_country] => US [patent_app_date] => 1997-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 44 [patent_no_of_words] => 19473 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/018/06018256.pdf [firstpage_image] =>[orig_patent_app_number] => 809895 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/809895
Output circuit and electronic apparatus using the same Mar 6, 1997 Issued
Array ( [id] => 4032594 [patent_doc_number] => 05883541 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'High frequency switching circuit' [patent_app_type] => 1 [patent_app_number] => 8/811931 [patent_app_country] => US [patent_app_date] => 1997-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6556 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/883/05883541.pdf [firstpage_image] =>[orig_patent_app_number] => 811931 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/811931
High frequency switching circuit Mar 4, 1997 Issued
Array ( [id] => 3768656 [patent_doc_number] => 05844427 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Monolithic integrated sensor circuit' [patent_app_type] => 1 [patent_app_number] => 8/806905 [patent_app_country] => US [patent_app_date] => 1997-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4029 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/844/05844427.pdf [firstpage_image] =>[orig_patent_app_number] => 806905 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/806905
Monolithic integrated sensor circuit Feb 25, 1997 Issued
Array ( [id] => 3837108 [patent_doc_number] => 05760621 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Method for operating a charge conserving driver circuit for capacitive loads' [patent_app_type] => 1 [patent_app_number] => 8/806826 [patent_app_country] => US [patent_app_date] => 1997-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5271 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/760/05760621.pdf [firstpage_image] =>[orig_patent_app_number] => 806826 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/806826
Method for operating a charge conserving driver circuit for capacitive loads Feb 25, 1997 Issued
Array ( [id] => 4059298 [patent_doc_number] => 05933045 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-03 [patent_title] => 'Ratio correction circuit and method for comparison of proportional to absolute temperature signals to bandgap-based signals' [patent_app_type] => 1 [patent_app_number] => 8/798518 [patent_app_country] => US [patent_app_date] => 1997-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4320 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/933/05933045.pdf [firstpage_image] =>[orig_patent_app_number] => 798518 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/798518
Ratio correction circuit and method for comparison of proportional to absolute temperature signals to bandgap-based signals Feb 9, 1997 Issued
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