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My Trang Ton

Examiner (ID: 3916, Phone: (571)272-1754 , Office: P/3992 )

Most Active Art Unit
2816
Art Unit(s)
3992, 2816, 2504
Total Applications
1512
Issued Applications
1345
Pending Applications
95
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3767426 [patent_doc_number] => 05852375 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-22 [patent_title] => '5v tolerant I/O circuit' [patent_app_type] => 1 [patent_app_number] => 8/797565 [patent_app_country] => US [patent_app_date] => 1997-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1690 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/852/05852375.pdf [firstpage_image] =>[orig_patent_app_number] => 797565 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/797565
5v tolerant I/O circuit Feb 6, 1997 Issued
Array ( [id] => 3876404 [patent_doc_number] => 05838175 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Low distortion track and hold circuit' [patent_app_type] => 1 [patent_app_number] => 8/795222 [patent_app_country] => US [patent_app_date] => 1997-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5655 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838175.pdf [firstpage_image] =>[orig_patent_app_number] => 795222 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/795222
Low distortion track and hold circuit Feb 4, 1997 Issued
Array ( [id] => 4023314 [patent_doc_number] => 05907256 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-25 [patent_title] => 'Internal clock generator for self-timed circuit with reduced difference between a cycle of a clock and delay time of a combinational circuit' [patent_app_type] => 1 [patent_app_number] => 8/795351 [patent_app_country] => US [patent_app_date] => 1997-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 8139 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/907/05907256.pdf [firstpage_image] =>[orig_patent_app_number] => 795351 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/795351
Internal clock generator for self-timed circuit with reduced difference between a cycle of a clock and delay time of a combinational circuit Feb 3, 1997 Issued
Array ( [id] => 4055907 [patent_doc_number] => 05869993 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Distortion compensation for a capacitively loaded follower' [patent_app_type] => 1 [patent_app_number] => 8/791121 [patent_app_country] => US [patent_app_date] => 1997-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2512 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/869/05869993.pdf [firstpage_image] =>[orig_patent_app_number] => 791121 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/791121
Distortion compensation for a capacitively loaded follower Jan 29, 1997 Issued
Array ( [id] => 3882371 [patent_doc_number] => 05825216 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Method of operating a drive circuit for a solenoid' [patent_app_type] => 1 [patent_app_number] => 8/788785 [patent_app_country] => US [patent_app_date] => 1997-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1629 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/825/05825216.pdf [firstpage_image] =>[orig_patent_app_number] => 788785 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/788785
Method of operating a drive circuit for a solenoid Jan 23, 1997 Issued
Array ( [id] => 3934143 [patent_doc_number] => 05952858 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Junction capacitor compensation for wave shaping' [patent_app_type] => 1 [patent_app_number] => 8/787976 [patent_app_country] => US [patent_app_date] => 1997-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1734 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/952/05952858.pdf [firstpage_image] =>[orig_patent_app_number] => 787976 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/787976
Junction capacitor compensation for wave shaping Jan 22, 1997 Issued
08/787081 HIGHLY LINEAR DC LEVEL-SHIFTER FOR AN ANALOG-TO-DIGITAL CONVERTER Jan 21, 1997 Abandoned
Array ( [id] => 4021771 [patent_doc_number] => 05880628 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'High-efficiency voltage booster circuit operating at very low supply voltage' [patent_app_type] => 1 [patent_app_number] => 8/783226 [patent_app_country] => US [patent_app_date] => 1997-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5919 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880628.pdf [firstpage_image] =>[orig_patent_app_number] => 783226 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/783226
High-efficiency voltage booster circuit operating at very low supply voltage Jan 13, 1997 Issued
Array ( [id] => 3934101 [patent_doc_number] => 05952855 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Circuit with multiple output voltages for multiple analog to digital converters' [patent_app_type] => 1 [patent_app_number] => 8/775958 [patent_app_country] => US [patent_app_date] => 1997-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3783 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/952/05952855.pdf [firstpage_image] =>[orig_patent_app_number] => 775958 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/775958
Circuit with multiple output voltages for multiple analog to digital converters Jan 2, 1997 Issued
Array ( [id] => 3910998 [patent_doc_number] => 05898329 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Programmable pulse width modulation circuit' [patent_app_type] => 1 [patent_app_number] => 8/775612 [patent_app_country] => US [patent_app_date] => 1996-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3319 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898329.pdf [firstpage_image] =>[orig_patent_app_number] => 775612 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/775612
Programmable pulse width modulation circuit Dec 30, 1996 Issued
Array ( [id] => 3839043 [patent_doc_number] => 05815009 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Process tolerant delay circuit having process sensitive and process insensitive components placed therein' [patent_app_type] => 1 [patent_app_number] => 8/777429 [patent_app_country] => US [patent_app_date] => 1996-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6037 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/815/05815009.pdf [firstpage_image] =>[orig_patent_app_number] => 777429 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/777429
Process tolerant delay circuit having process sensitive and process insensitive components placed therein Dec 29, 1996 Issued
Array ( [id] => 3950629 [patent_doc_number] => 05982222 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'High voltage generating circuit for a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/770626 [patent_app_country] => US [patent_app_date] => 1996-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4837 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/982/05982222.pdf [firstpage_image] =>[orig_patent_app_number] => 770626 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/770626
High voltage generating circuit for a semiconductor memory device Dec 18, 1996 Issued
Array ( [id] => 4021646 [patent_doc_number] => 05880622 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Method and apparatus for controlling a charge pump for rapid initialization' [patent_app_type] => 1 [patent_app_number] => 8/768297 [patent_app_country] => US [patent_app_date] => 1996-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4511 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880622.pdf [firstpage_image] =>[orig_patent_app_number] => 768297 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/768297
Method and apparatus for controlling a charge pump for rapid initialization Dec 16, 1996 Issued
Array ( [id] => 4033736 [patent_doc_number] => 05903184 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-11 [patent_title] => 'Semiconductor device having protection circuit' [patent_app_type] => 1 [patent_app_number] => 8/768889 [patent_app_country] => US [patent_app_date] => 1996-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5482 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/903/05903184.pdf [firstpage_image] =>[orig_patent_app_number] => 768889 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/768889
Semiconductor device having protection circuit Dec 16, 1996 Issued
Array ( [id] => 3749979 [patent_doc_number] => 05801555 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Correlative double sampling (CDS) device' [patent_app_type] => 1 [patent_app_number] => 8/763734 [patent_app_country] => US [patent_app_date] => 1996-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 31 [patent_no_of_words] => 3652 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/801/05801555.pdf [firstpage_image] =>[orig_patent_app_number] => 763734 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/763734
Correlative double sampling (CDS) device Dec 10, 1996 Issued
Array ( [id] => 4021536 [patent_doc_number] => 05880615 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Method and apparatus for detecting differential threshold levels while compensating for baseline wander' [patent_app_type] => 1 [patent_app_number] => 8/764720 [patent_app_country] => US [patent_app_date] => 1996-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 7423 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880615.pdf [firstpage_image] =>[orig_patent_app_number] => 764720 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/764720
Method and apparatus for detecting differential threshold levels while compensating for baseline wander Dec 9, 1996 Issued
Array ( [id] => 3840036 [patent_doc_number] => 05712730 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-27 [patent_title] => 'Diffractive optical device for the optical imaging of a spatial point onto other spatial points' [patent_app_type] => 1 [patent_app_number] => 8/761809 [patent_app_country] => US [patent_app_date] => 1996-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4592 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/712/05712730.pdf [firstpage_image] =>[orig_patent_app_number] => 761809 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/761809
Diffractive optical device for the optical imaging of a spatial point onto other spatial points Dec 5, 1996 Issued
Array ( [id] => 3832450 [patent_doc_number] => 05783957 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Differential amplifier circuit, CMOS inverter, demodulator circuit for pulse-width modulation, and sampling circuit' [patent_app_type] => 1 [patent_app_number] => 8/753917 [patent_app_country] => US [patent_app_date] => 1996-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 41 [patent_no_of_words] => 20641 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/783/05783957.pdf [firstpage_image] =>[orig_patent_app_number] => 753917 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/753917
Differential amplifier circuit, CMOS inverter, demodulator circuit for pulse-width modulation, and sampling circuit Dec 2, 1996 Issued
Array ( [id] => 3944670 [patent_doc_number] => 05872470 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Pipelined sample and hold circuit with correlated double sampling' [patent_app_type] => 1 [patent_app_number] => 8/758536 [patent_app_country] => US [patent_app_date] => 1996-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2905 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872470.pdf [firstpage_image] =>[orig_patent_app_number] => 758536 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/758536
Pipelined sample and hold circuit with correlated double sampling Nov 28, 1996 Issued
Array ( [id] => 3837277 [patent_doc_number] => 05760633 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Low power low noise circuit design using half V.sub.dd' [patent_app_type] => 1 [patent_app_number] => 8/757233 [patent_app_country] => US [patent_app_date] => 1996-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 2783 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/760/05760633.pdf [firstpage_image] =>[orig_patent_app_number] => 757233 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/757233
Low power low noise circuit design using half V.sub.dd Nov 26, 1996 Issued
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