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Examiner (ID: 3916, Phone: (571)272-1754 , Office: P/3992 )

Most Active Art Unit
2816
Art Unit(s)
3992, 2816, 2504
Total Applications
1512
Issued Applications
1345
Pending Applications
95
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3782556 [patent_doc_number] => 05808500 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Block architecture semiconductor memory array utilizing non-inverting pass gate local wordline driver' [patent_app_type] => 1 [patent_app_number] => 8/672757 [patent_app_country] => US [patent_app_date] => 1996-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3395 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/808/05808500.pdf [firstpage_image] =>[orig_patent_app_number] => 672757 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/672757
Block architecture semiconductor memory array utilizing non-inverting pass gate local wordline driver Jun 27, 1996 Issued
Array ( [id] => 3982676 [patent_doc_number] => 05917359 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Semiconductor apparatus having protective circuitry' [patent_app_type] => 1 [patent_app_number] => 8/671545 [patent_app_country] => US [patent_app_date] => 1996-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 8749 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 386 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917359.pdf [firstpage_image] =>[orig_patent_app_number] => 671545 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/671545
Semiconductor apparatus having protective circuitry Jun 26, 1996 Issued
Array ( [id] => 3791218 [patent_doc_number] => 05821780 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Comparator operable with low power supply voltage' [patent_app_type] => 1 [patent_app_number] => 8/672078 [patent_app_country] => US [patent_app_date] => 1996-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8047 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/821/05821780.pdf [firstpage_image] =>[orig_patent_app_number] => 672078 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/672078
Comparator operable with low power supply voltage Jun 25, 1996 Issued
Array ( [id] => 4000844 [patent_doc_number] => 05920219 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Clock-controlled precision monostable circuit' [patent_app_type] => 1 [patent_app_number] => 8/669066 [patent_app_country] => US [patent_app_date] => 1996-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8648 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920219.pdf [firstpage_image] =>[orig_patent_app_number] => 669066 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/669066
Clock-controlled precision monostable circuit Jun 23, 1996 Issued
Array ( [id] => 3837807 [patent_doc_number] => 05712582 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-27 [patent_title] => 'Test signal generator having timing calibration circuit' [patent_app_type] => 1 [patent_app_number] => 8/667399 [patent_app_country] => US [patent_app_date] => 1996-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3427 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/712/05712582.pdf [firstpage_image] =>[orig_patent_app_number] => 667399 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/667399
Test signal generator having timing calibration circuit Jun 20, 1996 Issued
Array ( [id] => 3792544 [patent_doc_number] => 05736878 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Low cost, high speed track and hold circuit' [patent_app_type] => 1 [patent_app_number] => 8/667557 [patent_app_country] => US [patent_app_date] => 1996-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1328 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/736/05736878.pdf [firstpage_image] =>[orig_patent_app_number] => 667557 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/667557
Low cost, high speed track and hold circuit Jun 20, 1996 Issued
Array ( [id] => 3982767 [patent_doc_number] => 05917363 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Multiplexed driver system requiring a reduced number of amplifier circuits' [patent_app_type] => 1 [patent_app_number] => 8/667751 [patent_app_country] => US [patent_app_date] => 1996-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3451 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917363.pdf [firstpage_image] =>[orig_patent_app_number] => 667751 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/667751
Multiplexed driver system requiring a reduced number of amplifier circuits Jun 20, 1996 Issued
Array ( [id] => 3867942 [patent_doc_number] => 05796294 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Circuits for generating a current which is proportional to absolute temperature' [patent_app_type] => 1 [patent_app_number] => 8/667962 [patent_app_country] => US [patent_app_date] => 1996-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2011 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796294.pdf [firstpage_image] =>[orig_patent_app_number] => 667962 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/667962
Circuits for generating a current which is proportional to absolute temperature Jun 18, 1996 Issued
Array ( [id] => 3894472 [patent_doc_number] => 05723994 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'Level boost restoration circuit' [patent_app_type] => 1 [patent_app_number] => 8/661288 [patent_app_country] => US [patent_app_date] => 1996-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 3111 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/723/05723994.pdf [firstpage_image] =>[orig_patent_app_number] => 661288 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/661288
Level boost restoration circuit Jun 9, 1996 Issued
Array ( [id] => 3792449 [patent_doc_number] => 05736872 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Low voltage high speed phase frequency detector' [patent_app_type] => 1 [patent_app_number] => 8/665007 [patent_app_country] => US [patent_app_date] => 1996-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 8232 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/736/05736872.pdf [firstpage_image] =>[orig_patent_app_number] => 665007 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/665007
Low voltage high speed phase frequency detector May 30, 1996 Issued
Array ( [id] => 3881664 [patent_doc_number] => 05764094 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Level shift circuit for analog signal and signal waveform generator including the same' [patent_app_type] => 1 [patent_app_number] => 8/657735 [patent_app_country] => US [patent_app_date] => 1996-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 8060 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/764/05764094.pdf [firstpage_image] =>[orig_patent_app_number] => 657735 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/657735
Level shift circuit for analog signal and signal waveform generator including the same May 30, 1996 Issued
Array ( [id] => 3822529 [patent_doc_number] => 05770960 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-23 [patent_title] => 'Process tolerant delay circuit' [patent_app_type] => 1 [patent_app_number] => 8/656801 [patent_app_country] => US [patent_app_date] => 1996-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6040 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/770/05770960.pdf [firstpage_image] =>[orig_patent_app_number] => 656801 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/656801
Process tolerant delay circuit May 30, 1996 Issued
Array ( [id] => 3734423 [patent_doc_number] => 05703502 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-30 [patent_title] => 'Circuitry that detects a phase difference between a first, base, clock and a second, derivative, clock derived from the base clock' [patent_app_type] => 1 [patent_app_number] => 8/652700 [patent_app_country] => US [patent_app_date] => 1996-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1586 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/703/05703502.pdf [firstpage_image] =>[orig_patent_app_number] => 652700 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/652700
Circuitry that detects a phase difference between a first, base, clock and a second, derivative, clock derived from the base clock May 29, 1996 Issued
Array ( [id] => 3708819 [patent_doc_number] => 05675278 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Level shifting circuit' [patent_app_type] => 1 [patent_app_number] => 8/654816 [patent_app_country] => US [patent_app_date] => 1996-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 8506 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675278.pdf [firstpage_image] =>[orig_patent_app_number] => 654816 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/654816
Level shifting circuit May 28, 1996 Issued
Array ( [id] => 3982147 [patent_doc_number] => 05905397 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Switching circuit and switched capacitor circuit including the switching circuit' [patent_app_type] => 1 [patent_app_number] => 8/654454 [patent_app_country] => US [patent_app_date] => 1996-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3034 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/905/05905397.pdf [firstpage_image] =>[orig_patent_app_number] => 654454 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/654454
Switching circuit and switched capacitor circuit including the switching circuit May 27, 1996 Issued
Array ( [id] => 3747432 [patent_doc_number] => 05786718 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Method and device for symmetrizing a clock signal' [patent_app_type] => 1 [patent_app_number] => 8/649721 [patent_app_country] => US [patent_app_date] => 1996-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1609 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/786/05786718.pdf [firstpage_image] =>[orig_patent_app_number] => 649721 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/649721
Method and device for symmetrizing a clock signal May 21, 1996 Issued
Array ( [id] => 3859767 [patent_doc_number] => 05767710 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Power-up reset signal generating circuit for an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/645899 [patent_app_country] => US [patent_app_date] => 1996-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2140 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/767/05767710.pdf [firstpage_image] =>[orig_patent_app_number] => 645899 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/645899
Power-up reset signal generating circuit for an integrated circuit May 13, 1996 Issued
Array ( [id] => 3663087 [patent_doc_number] => 05659261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'Analog-to-digital converter and output driver' [patent_app_type] => 1 [patent_app_number] => 8/645139 [patent_app_country] => US [patent_app_date] => 1996-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 68 [patent_no_of_words] => 13817 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659261.pdf [firstpage_image] =>[orig_patent_app_number] => 645139 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/645139
Analog-to-digital converter and output driver May 12, 1996 Issued
Array ( [id] => 3694315 [patent_doc_number] => 05663670 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-02 [patent_title] => 'Controllable variable delay inverter for a process tolerant delay circuit' [patent_app_type] => 1 [patent_app_number] => 8/646899 [patent_app_country] => US [patent_app_date] => 1996-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6037 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/663/05663670.pdf [firstpage_image] =>[orig_patent_app_number] => 646899 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/646899
Controllable variable delay inverter for a process tolerant delay circuit May 7, 1996 Issued
Array ( [id] => 3837263 [patent_doc_number] => 05760632 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Double-balanced mixer circuit' [patent_app_type] => 1 [patent_app_number] => 8/641237 [patent_app_country] => US [patent_app_date] => 1996-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6017 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/760/05760632.pdf [firstpage_image] =>[orig_patent_app_number] => 641237 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/641237
Double-balanced mixer circuit Apr 29, 1996 Issued
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