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My Trang Ton

Examiner (ID: 3916, Phone: (571)272-1754 , Office: P/3992 )

Most Active Art Unit
2816
Art Unit(s)
3992, 2816, 2504
Total Applications
1512
Issued Applications
1345
Pending Applications
95
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4055891 [patent_doc_number] => 05869992 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Delay time control circuit' [patent_app_type] => 1 [patent_app_number] => 8/641064 [patent_app_country] => US [patent_app_date] => 1996-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 4133 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/869/05869992.pdf [firstpage_image] =>[orig_patent_app_number] => 641064 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/641064
Delay time control circuit Apr 28, 1996 Issued
Array ( [id] => 3814645 [patent_doc_number] => 05831464 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Simplified differential single-shot' [patent_app_type] => 1 [patent_app_number] => 8/641062 [patent_app_country] => US [patent_app_date] => 1996-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 886 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/831/05831464.pdf [firstpage_image] =>[orig_patent_app_number] => 641062 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/641062
Simplified differential single-shot Apr 28, 1996 Issued
Array ( [id] => 3847717 [patent_doc_number] => 05744995 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Six-input multiplexer wtih two gate levels and three memory cells' [patent_app_type] => 1 [patent_app_number] => 8/635096 [patent_app_country] => US [patent_app_date] => 1996-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3133 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/744/05744995.pdf [firstpage_image] =>[orig_patent_app_number] => 635096 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/635096
Six-input multiplexer wtih two gate levels and three memory cells Apr 16, 1996 Issued
Array ( [id] => 4023342 [patent_doc_number] => 05907258 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-25 [patent_title] => 'Fully integrated two axis shock detector' [patent_app_type] => 1 [patent_app_number] => 8/634098 [patent_app_country] => US [patent_app_date] => 1996-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4880 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/907/05907258.pdf [firstpage_image] =>[orig_patent_app_number] => 634098 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/634098
Fully integrated two axis shock detector Apr 16, 1996 Issued
Array ( [id] => 3729589 [patent_doc_number] => 05672991 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-30 [patent_title] => 'Differential delay line circuit for outputting signal with equal pulse widths' [patent_app_type] => 1 [patent_app_number] => 8/632184 [patent_app_country] => US [patent_app_date] => 1996-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6074 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/672/05672991.pdf [firstpage_image] =>[orig_patent_app_number] => 632184 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/632184
Differential delay line circuit for outputting signal with equal pulse widths Apr 14, 1996 Issued
Array ( [id] => 4000180 [patent_doc_number] => 05892388 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Low power bias circuit using FET as a resistor' [patent_app_type] => 1 [patent_app_number] => 8/632781 [patent_app_country] => US [patent_app_date] => 1996-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3459 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/892/05892388.pdf [firstpage_image] =>[orig_patent_app_number] => 632781 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/632781
Low power bias circuit using FET as a resistor Apr 14, 1996 Issued
Array ( [id] => 3944656 [patent_doc_number] => 05872469 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Switched capacitor circuit adapted to store charge on a sampling capacitor related to a sample for an analog signal voltage and to subsequently transfer such stored charge' [patent_app_type] => 1 [patent_app_number] => 8/626136 [patent_app_country] => US [patent_app_date] => 1996-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3450 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872469.pdf [firstpage_image] =>[orig_patent_app_number] => 626136 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/626136
Switched capacitor circuit adapted to store charge on a sampling capacitor related to a sample for an analog signal voltage and to subsequently transfer such stored charge Apr 4, 1996 Issued
Array ( [id] => 3887153 [patent_doc_number] => 05798664 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-25 [patent_title] => 'Offset cancelling amplifier circuit having Miller integrator as offset detector' [patent_app_type] => 1 [patent_app_number] => 8/627357 [patent_app_country] => US [patent_app_date] => 1996-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4480 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/798/05798664.pdf [firstpage_image] =>[orig_patent_app_number] => 627357 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/627357
Offset cancelling amplifier circuit having Miller integrator as offset detector Apr 4, 1996 Issued
Array ( [id] => 3894366 [patent_doc_number] => 05777494 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Signal discrimination circuit for unknown signal amplitude and distortion' [patent_app_type] => 1 [patent_app_number] => 8/627643 [patent_app_country] => US [patent_app_date] => 1996-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2571 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/777/05777494.pdf [firstpage_image] =>[orig_patent_app_number] => 627643 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/627643
Signal discrimination circuit for unknown signal amplitude and distortion Apr 3, 1996 Issued
Array ( [id] => 3778029 [patent_doc_number] => 05774014 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'Integrated buffer circuit which functions independently of fluctuations on the supply voltage' [patent_app_type] => 1 [patent_app_number] => 8/627568 [patent_app_country] => US [patent_app_date] => 1996-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3043 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 425 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/774/05774014.pdf [firstpage_image] =>[orig_patent_app_number] => 627568 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/627568
Integrated buffer circuit which functions independently of fluctuations on the supply voltage Apr 3, 1996 Issued
Array ( [id] => 3728513 [patent_doc_number] => 05682111 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-28 [patent_title] => 'Integrated circuit with power monitor' [patent_app_type] => 1 [patent_app_number] => 8/630874 [patent_app_country] => US [patent_app_date] => 1996-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 7584 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/682/05682111.pdf [firstpage_image] =>[orig_patent_app_number] => 630874 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/630874
Integrated circuit with power monitor Apr 1, 1996 Issued
Array ( [id] => 3742676 [patent_doc_number] => 05698999 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-16 [patent_title] => 'Sampling and holding device' [patent_app_type] => 1 [patent_app_number] => 8/620790 [patent_app_country] => US [patent_app_date] => 1996-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5458 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/698/05698999.pdf [firstpage_image] =>[orig_patent_app_number] => 620790 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/620790
Sampling and holding device Mar 27, 1996 Issued
Array ( [id] => 3796474 [patent_doc_number] => 05841301 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Valuable threshold waveform shaping apparatus' [patent_app_type] => 1 [patent_app_number] => 8/618620 [patent_app_country] => US [patent_app_date] => 1996-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 10492 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/841/05841301.pdf [firstpage_image] =>[orig_patent_app_number] => 618620 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/618620
Valuable threshold waveform shaping apparatus Mar 19, 1996 Issued
Array ( [id] => 4059136 [patent_doc_number] => 05933033 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-03 [patent_title] => 'Signal processing apparatus capable of reducing conversion error of a number of parallel-arranged signal converters' [patent_app_type] => 1 [patent_app_number] => 8/616457 [patent_app_country] => US [patent_app_date] => 1996-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 35 [patent_no_of_words] => 6969 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/933/05933033.pdf [firstpage_image] =>[orig_patent_app_number] => 616457 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/616457
Signal processing apparatus capable of reducing conversion error of a number of parallel-arranged signal converters Mar 14, 1996 Issued
Array ( [id] => 3634710 [patent_doc_number] => 05686847 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Reduced sensitivity power-on reset circuitry' [patent_app_type] => 1 [patent_app_number] => 8/616421 [patent_app_country] => US [patent_app_date] => 1996-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2601 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/686/05686847.pdf [firstpage_image] =>[orig_patent_app_number] => 616421 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/616421
Reduced sensitivity power-on reset circuitry Mar 14, 1996 Issued
Array ( [id] => 3775540 [patent_doc_number] => 05734274 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-31 [patent_title] => 'Fuse-programmable method and apparatus for preventing a semiconductor device from operating at speed greater than an approved speed' [patent_app_type] => 1 [patent_app_number] => 8/574718 [patent_app_country] => US [patent_app_date] => 1996-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1831 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/734/05734274.pdf [firstpage_image] =>[orig_patent_app_number] => 574718 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/574718
Fuse-programmable method and apparatus for preventing a semiconductor device from operating at speed greater than an approved speed Mar 10, 1996 Issued
Array ( [id] => 3784756 [patent_doc_number] => 05818276 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Non-overlapping clock generator circuit and method therefor' [patent_app_type] => 1 [patent_app_number] => 8/610178 [patent_app_country] => US [patent_app_date] => 1996-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 6491 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/818/05818276.pdf [firstpage_image] =>[orig_patent_app_number] => 610178 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/610178
Non-overlapping clock generator circuit and method therefor Mar 3, 1996 Issued
Array ( [id] => 3848523 [patent_doc_number] => 05708377 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Low power dual sampler utilizing step recovery diodes (SRDS)' [patent_app_type] => 1 [patent_app_number] => 8/606380 [patent_app_country] => US [patent_app_date] => 1996-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3001 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708377.pdf [firstpage_image] =>[orig_patent_app_number] => 606380 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/606380
Low power dual sampler utilizing step recovery diodes (SRDS) Feb 22, 1996 Issued
Array ( [id] => 3775570 [patent_doc_number] => 05734276 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-31 [patent_title] => 'Circuit and method for reducing distortion in a track and hold amplifier' [patent_app_type] => 1 [patent_app_number] => 8/603142 [patent_app_country] => US [patent_app_date] => 1996-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4754 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/734/05734276.pdf [firstpage_image] =>[orig_patent_app_number] => 603142 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/603142
Circuit and method for reducing distortion in a track and hold amplifier Feb 19, 1996 Issued
Array ( [id] => 3693744 [patent_doc_number] => 05691657 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-25 [patent_title] => 'Sample-and-hold circuit including a robust leakage current compensating circuit' [patent_app_type] => 1 [patent_app_number] => 8/600007 [patent_app_country] => US [patent_app_date] => 1996-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8068 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/691/05691657.pdf [firstpage_image] =>[orig_patent_app_number] => 600007 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/600007
Sample-and-hold circuit including a robust leakage current compensating circuit Feb 13, 1996 Issued
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