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Examiner (ID: 3916, Phone: (571)272-1754 , Office: P/3992 )

Most Active Art Unit
2816
Art Unit(s)
3992, 2816, 2504
Total Applications
1512
Issued Applications
1345
Pending Applications
95
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
08/530355 METHOD AND APPARATUS IN A SEMICONDUCTOR CIRCUIT Dec 14, 1995 Abandoned
08/573012 ADAPTIVE RESISTOR TRIMMING CIRCUIT Dec 14, 1995 Abandoned
Array ( [id] => 3723023 [patent_doc_number] => 05617054 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-01 [patent_title] => 'Switched capacitor voltage error compensating circuit' [patent_app_type] => 1 [patent_app_number] => 8/572318 [patent_app_country] => US [patent_app_date] => 1995-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1360 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/617/05617054.pdf [firstpage_image] =>[orig_patent_app_number] => 572318 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/572318
Switched capacitor voltage error compensating circuit Dec 13, 1995 Issued
Array ( [id] => 3639879 [patent_doc_number] => 05631599 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-20 [patent_title] => 'Two stage current mirror' [patent_app_type] => 1 [patent_app_number] => 8/571693 [patent_app_country] => US [patent_app_date] => 1995-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 33 [patent_no_of_words] => 6851 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/631/05631599.pdf [firstpage_image] =>[orig_patent_app_number] => 571693 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/571693
Two stage current mirror Dec 12, 1995 Issued
Array ( [id] => 3699916 [patent_doc_number] => 05650743 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-22 [patent_title] => 'Common mode controlled signal multiplier' [patent_app_type] => 1 [patent_app_number] => 8/570911 [patent_app_country] => US [patent_app_date] => 1995-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/650/05650743.pdf [firstpage_image] =>[orig_patent_app_number] => 570911 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/570911
Common mode controlled signal multiplier Dec 11, 1995 Issued
Array ( [id] => 3837338 [patent_doc_number] => 05760637 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Programmable charge pump' [patent_app_type] => 1 [patent_app_number] => 8/570558 [patent_app_country] => US [patent_app_date] => 1995-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 33 [patent_no_of_words] => 3139 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/760/05760637.pdf [firstpage_image] =>[orig_patent_app_number] => 570558 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/570558
Programmable charge pump Dec 10, 1995 Issued
08/565382 HIGH SPEED DATA SAMPLING SYSTEM Nov 29, 1995 Abandoned
08/562970 CHARGE PUMP Nov 26, 1995 Abandoned
Array ( [id] => 3666796 [patent_doc_number] => 05656959 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Clock synthesizer dual function pin system and method therefor' [patent_app_type] => 1 [patent_app_number] => 8/562478 [patent_app_country] => US [patent_app_date] => 1995-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2799 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/656/05656959.pdf [firstpage_image] =>[orig_patent_app_number] => 562478 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/562478
Clock synthesizer dual function pin system and method therefor Nov 23, 1995 Issued
Array ( [id] => 3668011 [patent_doc_number] => 05625308 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-29 [patent_title] => 'Two input-two output differential latch circuit' [patent_app_type] => 1 [patent_app_number] => 8/557556 [patent_app_country] => US [patent_app_date] => 1995-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 15460 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/625/05625308.pdf [firstpage_image] =>[orig_patent_app_number] => 557556 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/557556
Two input-two output differential latch circuit Nov 13, 1995 Issued
Array ( [id] => 3688138 [patent_doc_number] => 05633611 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Complementary current source circuit' [patent_app_type] => 1 [patent_app_number] => 8/557713 [patent_app_country] => US [patent_app_date] => 1995-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 30 [patent_no_of_words] => 6223 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/633/05633611.pdf [firstpage_image] =>[orig_patent_app_number] => 557713 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/557713
Complementary current source circuit Nov 12, 1995 Issued
Array ( [id] => 3661152 [patent_doc_number] => 05623222 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-22 [patent_title] => 'Voltage converting circuit and multiphase clock generating circuit used for driving the same' [patent_app_type] => 1 [patent_app_number] => 8/555179 [patent_app_country] => US [patent_app_date] => 1995-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 31 [patent_no_of_words] => 10767 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/623/05623222.pdf [firstpage_image] =>[orig_patent_app_number] => 555179 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/555179
Voltage converting circuit and multiphase clock generating circuit used for driving the same Nov 7, 1995 Issued
Array ( [id] => 3847632 [patent_doc_number] => 05744990 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Enhanced power-on-reset/low voltage detection circuit' [patent_app_type] => 1 [patent_app_number] => 8/555369 [patent_app_country] => US [patent_app_date] => 1995-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3743 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/744/05744990.pdf [firstpage_image] =>[orig_patent_app_number] => 555369 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/555369
Enhanced power-on-reset/low voltage detection circuit Nov 7, 1995 Issued
Array ( [id] => 3653346 [patent_doc_number] => 05638017 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-10 [patent_title] => 'Pulse width modulation circuit' [patent_app_type] => 1 [patent_app_number] => 8/551784 [patent_app_country] => US [patent_app_date] => 1995-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1874 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/638/05638017.pdf [firstpage_image] =>[orig_patent_app_number] => 551784 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/551784
Pulse width modulation circuit Nov 6, 1995 Issued
Array ( [id] => 3512592 [patent_doc_number] => 05570048 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-29 [patent_title] => 'Sample-and-hold circuit with reduced clock feedthrough' [patent_app_type] => 1 [patent_app_number] => 8/554399 [patent_app_country] => US [patent_app_date] => 1995-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1655 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/570/05570048.pdf [firstpage_image] =>[orig_patent_app_number] => 554399 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/554399
Sample-and-hold circuit with reduced clock feedthrough Nov 5, 1995 Issued
Array ( [id] => 3893387 [patent_doc_number] => 05714905 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-03 [patent_title] => 'Latch-down-resistant protection circuits and voltage regulator' [patent_app_type] => 1 [patent_app_number] => 8/549009 [patent_app_country] => US [patent_app_date] => 1995-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5083 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/714/05714905.pdf [firstpage_image] =>[orig_patent_app_number] => 549009 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/549009
Latch-down-resistant protection circuits and voltage regulator Oct 26, 1995 Issued
Array ( [id] => 3634844 [patent_doc_number] => 05686856 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Multiplexer of logic variables' [patent_app_type] => 1 [patent_app_number] => 8/549253 [patent_app_country] => US [patent_app_date] => 1995-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 21 [patent_no_of_words] => 3761 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/686/05686856.pdf [firstpage_image] =>[orig_patent_app_number] => 549253 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/549253
Multiplexer of logic variables Oct 26, 1995 Issued
Array ( [id] => 3700004 [patent_doc_number] => 05680068 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-21 [patent_title] => 'Semiconductor integrated circuit for suppressing overshooting and ringing' [patent_app_type] => 1 [patent_app_number] => 8/546108 [patent_app_country] => US [patent_app_date] => 1995-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5527 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/680/05680068.pdf [firstpage_image] =>[orig_patent_app_number] => 546108 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/546108
Semiconductor integrated circuit for suppressing overshooting and ringing Oct 19, 1995 Issued
Array ( [id] => 3894444 [patent_doc_number] => 05723992 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'Low leakage output driver circuit which can be utilized in a multi-voltage source' [patent_app_type] => 1 [patent_app_number] => 8/545158 [patent_app_country] => US [patent_app_date] => 1995-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2122 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/723/05723992.pdf [firstpage_image] =>[orig_patent_app_number] => 545158 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/545158
Low leakage output driver circuit which can be utilized in a multi-voltage source Oct 18, 1995 Issued
Array ( [id] => 3733634 [patent_doc_number] => 05652533 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-29 [patent_title] => 'Circuit for generating sampling signals at closely spaced time intervals' [patent_app_type] => 1 [patent_app_number] => 8/545560 [patent_app_country] => US [patent_app_date] => 1995-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8956 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/652/05652533.pdf [firstpage_image] =>[orig_patent_app_number] => 545560 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/545560
Circuit for generating sampling signals at closely spaced time intervals Oct 18, 1995 Issued
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