Search

Myron Wyche

Examiner (ID: 17674, Phone: (571)272-3390 , Office: P/2644 )

Most Active Art Unit
2644
Art Unit(s)
2644, 2744, 2608, 2617, 2749
Total Applications
1132
Issued Applications
926
Pending Applications
81
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4423865 [patent_doc_number] => 06230119 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Integrated circuit with embedded emulator and emulation system for use with such an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/019789 [patent_app_country] => US [patent_app_date] => 1998-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4602 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/230/06230119.pdf [firstpage_image] =>[orig_patent_app_number] => 019789 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/019789
Integrated circuit with embedded emulator and emulation system for use with such an integrated circuit Feb 5, 1998 Issued
Array ( [id] => 4146453 [patent_doc_number] => 06016390 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Method and apparatus for eliminating bitline voltage offsets in memory devices' [patent_app_type] => 1 [patent_app_number] => 9/015427 [patent_app_country] => US [patent_app_date] => 1998-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4945 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/016/06016390.pdf [firstpage_image] =>[orig_patent_app_number] => 015427 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/015427
Method and apparatus for eliminating bitline voltage offsets in memory devices Jan 28, 1998 Issued
Array ( [id] => 4249205 [patent_doc_number] => 06075936 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Logic circuit simulation apparatus having cycle-based simulator for simulating circuits including multi-cycle paths' [patent_app_type] => 1 [patent_app_number] => 9/009930 [patent_app_country] => US [patent_app_date] => 1998-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 6984 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/075/06075936.pdf [firstpage_image] =>[orig_patent_app_number] => 009930 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/009930
Logic circuit simulation apparatus having cycle-based simulator for simulating circuits including multi-cycle paths Jan 20, 1998 Issued
Array ( [id] => 4426610 [patent_doc_number] => 06195622 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Methods and apparatus for building attribute transition probability models for use in pre-fetching resources' [patent_app_type] => 1 [patent_app_number] => 9/007902 [patent_app_country] => US [patent_app_date] => 1998-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 45 [patent_no_of_words] => 22786 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/195/06195622.pdf [firstpage_image] =>[orig_patent_app_number] => 007902 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/007902
Methods and apparatus for building attribute transition probability models for use in pre-fetching resources Jan 14, 1998 Issued
Array ( [id] => 4164380 [patent_doc_number] => 06083267 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'System and method for designing accessory' [patent_app_type] => 1 [patent_app_number] => 9/006950 [patent_app_country] => US [patent_app_date] => 1998-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3663 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/083/06083267.pdf [firstpage_image] =>[orig_patent_app_number] => 006950 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/006950
System and method for designing accessory Jan 13, 1998 Issued
Array ( [id] => 4271829 [patent_doc_number] => 06208953 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Method for monitoring plants with mechanical components' [patent_app_type] => 1 [patent_app_number] => 9/006925 [patent_app_country] => US [patent_app_date] => 1998-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 9376 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/208/06208953.pdf [firstpage_image] =>[orig_patent_app_number] => 006925 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/006925
Method for monitoring plants with mechanical components Jan 13, 1998 Issued
Array ( [id] => 4145710 [patent_doc_number] => 06128587 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Method and apparatus using Bayesian subfamily identification for sequence analysis' [patent_app_type] => 1 [patent_app_number] => 9/006924 [patent_app_country] => US [patent_app_date] => 1998-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 10259 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/128/06128587.pdf [firstpage_image] =>[orig_patent_app_number] => 006924 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/006924
Method and apparatus using Bayesian subfamily identification for sequence analysis Jan 13, 1998 Issued
Array ( [id] => 4134508 [patent_doc_number] => 06072946 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Computerized method and system for interactively simulating telecommunications services' [patent_app_type] => 1 [patent_app_number] => 9/001176 [patent_app_country] => US [patent_app_date] => 1997-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 2396 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/072/06072946.pdf [firstpage_image] =>[orig_patent_app_number] => 001176 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/001176
Computerized method and system for interactively simulating telecommunications services Dec 29, 1997 Issued
Array ( [id] => 4229103 [patent_doc_number] => 06090147 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Computer program media, method and system for vibration and acoustic analysis of complex structural-acoustic systems' [patent_app_type] => 1 [patent_app_number] => 8/986037 [patent_app_country] => US [patent_app_date] => 1997-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 13935 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/090/06090147.pdf [firstpage_image] =>[orig_patent_app_number] => 986037 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/986037
Computer program media, method and system for vibration and acoustic analysis of complex structural-acoustic systems Dec 4, 1997 Issued
Array ( [id] => 4137497 [patent_doc_number] => 06063126 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Modeling system having constraint solvers' [patent_app_type] => 1 [patent_app_number] => 8/984981 [patent_app_country] => US [patent_app_date] => 1997-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4290 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/063/06063126.pdf [firstpage_image] =>[orig_patent_app_number] => 984981 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/984981
Modeling system having constraint solvers Dec 3, 1997 Issued
Array ( [id] => 4137524 [patent_doc_number] => 06063128 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Object-oriented computerized modeling system' [patent_app_type] => 1 [patent_app_number] => 8/966888 [patent_app_country] => US [patent_app_date] => 1997-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 26 [patent_no_of_words] => 29492 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/063/06063128.pdf [firstpage_image] =>[orig_patent_app_number] => 966888 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/966888
Object-oriented computerized modeling system Nov 9, 1997 Issued
Array ( [id] => 4290357 [patent_doc_number] => 06246975 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Computer architecture and process of patient generation, evolution, and simulation for computer based testing system' [patent_app_type] => 1 [patent_app_number] => 8/961185 [patent_app_country] => US [patent_app_date] => 1997-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 28424 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/246/06246975.pdf [firstpage_image] =>[orig_patent_app_number] => 961185 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/961185
Computer architecture and process of patient generation, evolution, and simulation for computer based testing system Oct 29, 1997 Issued
Array ( [id] => 4205841 [patent_doc_number] => 06086620 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Audio sample tracker' [patent_app_type] => 1 [patent_app_number] => 8/960019 [patent_app_country] => US [patent_app_date] => 1997-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3039 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/086/06086620.pdf [firstpage_image] =>[orig_patent_app_number] => 960019 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/960019
Audio sample tracker Oct 28, 1997 Issued
Array ( [id] => 4204306 [patent_doc_number] => 06161211 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Method and apparatus for automated circuit design' [patent_app_type] => 1 [patent_app_number] => 8/958778 [patent_app_country] => US [patent_app_date] => 1997-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5156 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/161/06161211.pdf [firstpage_image] =>[orig_patent_app_number] => 958778 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/958778
Method and apparatus for automated circuit design Oct 26, 1997 Issued
Array ( [id] => 4372408 [patent_doc_number] => 06292765 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Method for automatically searching for functional defects in a description of a circuit' [patent_app_type] => 1 [patent_app_number] => 8/954765 [patent_app_country] => US [patent_app_date] => 1997-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 8329 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/292/06292765.pdf [firstpage_image] =>[orig_patent_app_number] => 954765 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/954765
Method for automatically searching for functional defects in a description of a circuit Oct 19, 1997 Issued
Array ( [id] => 4315614 [patent_doc_number] => 06185516 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Automata-theoretic verification of systems' [patent_app_type] => 1 [patent_app_number] => 8/946473 [patent_app_country] => US [patent_app_date] => 1997-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 13007 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/185/06185516.pdf [firstpage_image] =>[orig_patent_app_number] => 946473 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/946473
Automata-theoretic verification of systems Oct 6, 1997 Issued
Array ( [id] => 4016919 [patent_doc_number] => 05987243 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Hardware and software co-simulator and its method' [patent_app_type] => 1 [patent_app_number] => 8/919779 [patent_app_country] => US [patent_app_date] => 1997-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4197 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/987/05987243.pdf [firstpage_image] =>[orig_patent_app_number] => 919779 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/919779
Hardware and software co-simulator and its method Aug 28, 1997 Issued
Array ( [id] => 4333132 [patent_doc_number] => 06243665 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Monitoring and control apparatus incorporating run-time fault detection by boundary scan logic testing' [patent_app_type] => 1 [patent_app_number] => 8/894630 [patent_app_country] => US [patent_app_date] => 1997-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 15275 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/243/06243665.pdf [firstpage_image] =>[orig_patent_app_number] => 894630 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/894630
Monitoring and control apparatus incorporating run-time fault detection by boundary scan logic testing Aug 21, 1997 Issued
Array ( [id] => 4164408 [patent_doc_number] => 06083269 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Digital integrated circuit design system and methodology with hardware' [patent_app_type] => 1 [patent_app_number] => 8/914493 [patent_app_country] => US [patent_app_date] => 1997-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3976 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/083/06083269.pdf [firstpage_image] =>[orig_patent_app_number] => 914493 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/914493
Digital integrated circuit design system and methodology with hardware Aug 18, 1997 Issued
Array ( [id] => 4374591 [patent_doc_number] => 06219628 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'System and method for configuring an instrument to perform measurement functions utilizing conversion of graphical programs into hardware implementations' [patent_app_type] => 1 [patent_app_number] => 8/912427 [patent_app_country] => US [patent_app_date] => 1997-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 13889 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/219/06219628.pdf [firstpage_image] =>[orig_patent_app_number] => 912427 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/912427
System and method for configuring an instrument to perform measurement functions utilizing conversion of graphical programs into hardware implementations Aug 17, 1997 Issued
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