Search

Nam Thanh Nguyen

Examiner (ID: 741)

Most Active Art Unit
2824
Art Unit(s)
2824, CSDE
Total Applications
700
Issued Applications
674
Pending Applications
6
Abandoned Applications
24

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6006020 [patent_doc_number] => 20110058406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-10 [patent_title] => 'RESISTIVE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/946596 [patent_app_country] => US [patent_app_date] => 2010-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 15790 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20110058406.pdf [firstpage_image] =>[orig_patent_app_number] => 12946596 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/946596
Resistive memory Nov 14, 2010 Issued
Array ( [id] => 7528799 [patent_doc_number] => 08045403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-25 [patent_title] => 'Programming method and memory device using the same' [patent_app_type] => utility [patent_app_number] => 12/943443 [patent_app_country] => US [patent_app_date] => 2010-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3991 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/045/08045403.pdf [firstpage_image] =>[orig_patent_app_number] => 12943443 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/943443
Programming method and memory device using the same Nov 9, 2010 Issued
Array ( [id] => 8471262 [patent_doc_number] => 08300450 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Implementing physically unclonable function (PUF) utilizing EDRAM memory cell capacitance variation' [patent_app_type] => utility [patent_app_number] => 12/938477 [patent_app_country] => US [patent_app_date] => 2010-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2819 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12938477 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/938477
Implementing physically unclonable function (PUF) utilizing EDRAM memory cell capacitance variation Nov 2, 2010 Issued
Array ( [id] => 8798313 [patent_doc_number] => 08437191 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Flash memory device and operating method thereof' [patent_app_type] => utility [patent_app_number] => 12/914091 [patent_app_country] => US [patent_app_date] => 2010-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4289 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12914091 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/914091
Flash memory device and operating method thereof Oct 27, 2010 Issued
Array ( [id] => 5983262 [patent_doc_number] => 20110096616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'SENSE AMPLIFIER CIRCUIT TO ENABLE SPEEDING-UP OF READOUT OF INFORMATION FROM MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 12/904337 [patent_app_country] => US [patent_app_date] => 2010-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7165 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20110096616.pdf [firstpage_image] =>[orig_patent_app_number] => 12904337 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/904337
SENSE AMPLIFIER CIRCUIT TO ENABLE SPEEDING-UP OF READOUT OF INFORMATION FROM MEMORY CELLS Oct 13, 2010 Abandoned
Array ( [id] => 8216619 [patent_doc_number] => 08194431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-05 [patent_title] => 'Programmable antifuse transistor and method for programming thereof' [patent_app_type] => utility [patent_app_number] => 12/901515 [patent_app_country] => US [patent_app_date] => 2010-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5291 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/194/08194431.pdf [firstpage_image] =>[orig_patent_app_number] => 12901515 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/901515
Programmable antifuse transistor and method for programming thereof Oct 8, 2010 Issued
Array ( [id] => 8092709 [patent_doc_number] => 20120081966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'COMBINED EEPROM/FLASH NON-VOLATILE MEMORY CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/898183 [patent_app_country] => US [patent_app_date] => 2010-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5742 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20120081966.pdf [firstpage_image] =>[orig_patent_app_number] => 12898183 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/898183
Combined EEPROM/flash non-volatile memory circuit Oct 4, 2010 Issued
Array ( [id] => 8092719 [patent_doc_number] => 20120081963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'MULTI-STEP CHANNEL BOOSTING TO REDUCE CHANNEL TO FLOATING GATE COUPLING IN MEMORY' [patent_app_type] => utility [patent_app_number] => 12/894889 [patent_app_country] => US [patent_app_date] => 2010-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 16804 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20120081963.pdf [firstpage_image] =>[orig_patent_app_number] => 12894889 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/894889
Multi-step channel boosting to reduce channel to floating gate coupling in memory Sep 29, 2010 Issued
Array ( [id] => 8436847 [patent_doc_number] => 08284622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-09 [patent_title] => 'Memory device with phase distribution circuit for controlling relative durations of precharge and active phases' [patent_app_type] => utility [patent_app_number] => 12/893153 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4945 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12893153 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/893153
Memory device with phase distribution circuit for controlling relative durations of precharge and active phases Sep 28, 2010 Issued
Array ( [id] => 8798316 [patent_doc_number] => 08437194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Driving method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/892121 [patent_app_country] => US [patent_app_date] => 2010-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 35 [patent_no_of_words] => 9311 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12892121 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/892121
Driving method of semiconductor device Sep 27, 2010 Issued
Array ( [id] => 6180939 [patent_doc_number] => 20110122676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/887043 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 17174 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20110122676.pdf [firstpage_image] =>[orig_patent_app_number] => 12887043 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887043
Semiconductor memory device Sep 20, 2010 Issued
Array ( [id] => 7485042 [patent_doc_number] => 20110235392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'NONVOLATILE SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/885881 [patent_app_country] => US [patent_app_date] => 2010-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9785 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20110235392.pdf [firstpage_image] =>[orig_patent_app_number] => 12885881 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/885881
Nonvolatile semiconductor storage device Sep 19, 2010 Issued
Array ( [id] => 6078185 [patent_doc_number] => 20110141823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR CONTROLLING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/884951 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9885 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20110141823.pdf [firstpage_image] =>[orig_patent_app_number] => 12884951 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884951
Semiconductor memory device and method for controlling the same Sep 16, 2010 Issued
Array ( [id] => 7816582 [patent_doc_number] => 20120063202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => '3T DRAM CELL WITH ADDED CAPACITANCE ON STORAGE NODE' [patent_app_type] => utility [patent_app_number] => 12/882355 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5933 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20120063202.pdf [firstpage_image] =>[orig_patent_app_number] => 12882355 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/882355
3T DRAM cell with added capacitance on storage node Sep 14, 2010 Issued
Array ( [id] => 8353532 [patent_doc_number] => 08248872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-21 [patent_title] => 'Semiconductor memory device and test method thereof' [patent_app_type] => utility [patent_app_number] => 12/881693 [patent_app_country] => US [patent_app_date] => 2010-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10138 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12881693 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/881693
Semiconductor memory device and test method thereof Sep 13, 2010 Issued
Array ( [id] => 7789605 [patent_doc_number] => 20120051161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'MEMORY DEVICES AND METHODS OF OPERATING MEMORY' [patent_app_type] => utility [patent_app_number] => 12/872587 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4092 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20120051161.pdf [firstpage_image] =>[orig_patent_app_number] => 12872587 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/872587
Memory devices and methods of operating memory Aug 30, 2010 Issued
Array ( [id] => 7789565 [patent_doc_number] => 20120051121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'POWER GATEABLE RETENTION STORAGE ELEMENT' [patent_app_type] => utility [patent_app_number] => 12/862131 [patent_app_country] => US [patent_app_date] => 2010-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8243 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20120051121.pdf [firstpage_image] =>[orig_patent_app_number] => 12862131 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/862131
Power gateable retention storage element Aug 23, 2010 Issued
Array ( [id] => 7704031 [patent_doc_number] => 08089794 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-01-03 [patent_title] => 'Precharge circuits and methods for content addressable memory (CAM) and related devices' [patent_app_type] => utility [patent_app_number] => 12/861084 [patent_app_country] => US [patent_app_date] => 2010-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 24 [patent_no_of_words] => 10128 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/089/08089794.pdf [firstpage_image] =>[orig_patent_app_number] => 12861084 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/861084
Precharge circuits and methods for content addressable memory (CAM) and related devices Aug 22, 2010 Issued
Array ( [id] => 8666002 [patent_doc_number] => 08379470 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-19 [patent_title] => 'Semiconductor memory devices, controllers, and semiconductor memory systems' [patent_app_type] => utility [patent_app_number] => 12/855409 [patent_app_country] => US [patent_app_date] => 2010-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4023 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12855409 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/855409
Semiconductor memory devices, controllers, and semiconductor memory systems Aug 11, 2010 Issued
Array ( [id] => 8295773 [patent_doc_number] => 08223566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-17 [patent_title] => 'Memory device and memory control method' [patent_app_type] => utility [patent_app_number] => 12/850283 [patent_app_country] => US [patent_app_date] => 2010-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3740 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12850283 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/850283
Memory device and memory control method Aug 3, 2010 Issued
Menu