Nam Thanh Nguyen

Array ( [id] => 8726929 [patent_doc_number] => 08406064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Latching circuit' [patent_app_type] => utility [patent_app_number] => 12/847371 [patent_app_country] => US [patent_app_date] => 2010-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10001 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12847371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7572255 [patent_doc_number] => 20110267911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-03 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/840253 [patent_app_country] => US [patent_app_date] => 2010-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2484 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20110267911.pdf [firstpage_image] =>[orig_patent_app_number] => 12840253 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7730141 [patent_doc_number] => 20120014179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'SOFT PROGRAM OF A NON-VOLATILE MEMORY BLOCK' [patent_app_type] => utility [patent_app_number] => 12/835309 [patent_app_country] => US [patent_app_date] => 2010-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5415 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20120014179.pdf [firstpage_image] =>[orig_patent_app_number] => 12835309 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6538251 [patent_doc_number] => 20100270994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'ADJUSTABLE VOLTAGE REGULATOR FOR PROVIDING A REGULATED OUTPUT VOLTAGE' [patent_app_type] => utility [patent_app_number] => 12/833692 [patent_app_country] => US [patent_app_date] => 2010-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4870 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20100270994.pdf [firstpage_image] =>[orig_patent_app_number] => 12833692 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6549979 [patent_doc_number] => 20100271894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'METHODS AND APPARATUS FOR EXTENDING THE EFFECTIVE THERMAL OPERATING RANGE OF A MEMORY' [patent_app_type] => utility [patent_app_number] => 12/828846 [patent_app_country] => US [patent_app_date] => 2010-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5078 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0271/20100271894.pdf [firstpage_image] =>[orig_patent_app_number] => 12828846 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4515110 [patent_doc_number] => 07916518 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-29 [patent_title] => 'VCC control inside data register of memory device' [patent_app_type] => utility [patent_app_number] => 12/823282 [patent_app_country] => US [patent_app_date] => 2010-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4443 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/916/07916518.pdf [firstpage_image] =>[orig_patent_app_number] => 12823282 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6233437 [patent_doc_number] => 20100265768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'SEMICONDUCTOR STORAGE APPARATUS, CONTROL APPARATUS AND CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 12/815536 [patent_app_country] => US [patent_app_date] => 2010-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 10520 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20100265768.pdf [firstpage_image] =>[orig_patent_app_number] => 12815536 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6289671 [patent_doc_number] => 20100238756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'Self Reset Clock Buffer In Memory Devices' [patent_app_type] => utility [patent_app_number] => 12/792982 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3186 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20100238756.pdf [firstpage_image] =>[orig_patent_app_number] => 12792982 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8341611 [patent_doc_number] => 08243539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/782159 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2447 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12782159 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8726901 [patent_doc_number] => 08406035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Nonvolatile memory device and method of writing data to nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 13/056925 [patent_app_country] => US [patent_app_date] => 2010-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 55 [patent_no_of_words] => 35825 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 535 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13056925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7585581 [patent_doc_number] => 20110280091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'MEMORY REPAIR SYSTEMS AND METHODS FOR A MEMORY HAVING REDUNDANT MEMORY' [patent_app_type] => utility [patent_app_number] => 12/779597 [patent_app_country] => US [patent_app_date] => 2010-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3921 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20110280091.pdf [firstpage_image] =>[orig_patent_app_number] => 12779597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6464800 [patent_doc_number] => 20100284235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-11 [patent_title] => 'Method and Control Unit for Operating a Volatile Memory, Circuit Arrangement, and Trip Recorder' [patent_app_type] => utility [patent_app_number] => 12/776811 [patent_app_country] => US [patent_app_date] => 2010-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2437 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20100284235.pdf [firstpage_image] =>[orig_patent_app_number] => 12776811 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6385161 [patent_doc_number] => 20100302876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'PACKAGE APPARATUS AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/774665 [patent_app_country] => US [patent_app_date] => 2010-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3501 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20100302876.pdf [firstpage_image] =>[orig_patent_app_number] => 12774665 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6044804 [patent_doc_number] => 20110205799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'OPERATION METHOD OF MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/772111 [patent_app_country] => US [patent_app_date] => 2010-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4325 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20110205799.pdf [firstpage_image] =>[orig_patent_app_number] => 12772111 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6426155 [patent_doc_number] => 20100277972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-04 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE INCLUDING A PLURALITY OF MEMORY CELL ARRAYS' [patent_app_type] => utility [patent_app_number] => 12/769523 [patent_app_country] => US [patent_app_date] => 2010-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6357 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20100277972.pdf [firstpage_image] =>[orig_patent_app_number] => 12769523 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8204650 [patent_doc_number] => 08189410 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-05-29 [patent_title] => 'Memory device and method thereof' [patent_app_type] => utility [patent_app_number] => 12/768299 [patent_app_country] => US [patent_app_date] => 2010-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13094 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/189/08189410.pdf [firstpage_image] =>[orig_patent_app_number] => 12768299 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8167474 [patent_doc_number] => 08174922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-08 [patent_title] => 'Anti-fuse memory cell and semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/662649 [patent_app_country] => US [patent_app_date] => 2010-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4640 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/174/08174922.pdf [firstpage_image] =>[orig_patent_app_number] => 12662649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4506955 [patent_doc_number] => 07920422 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-05 [patent_title] => 'All-bit-line erase verify and soft program verify' [patent_app_type] => utility [patent_app_number] => 12/767660 [patent_app_country] => US [patent_app_date] => 2010-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 19300 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/920/07920422.pdf [firstpage_image] =>[orig_patent_app_number] => 12767660 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8204647 [patent_doc_number] => 08189416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/662575 [patent_app_country] => US [patent_app_date] => 2010-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6924 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/189/08189416.pdf [firstpage_image] =>[orig_patent_app_number] => 12662575 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6374846 [patent_doc_number] => 20100315881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'NON-VOLATILE MEMORY DEVICE AND METHOD OF READING DATA IN A NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/765011 [patent_app_country] => US [patent_app_date] => 2010-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5459 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20100315881.pdf [firstpage_image] =>[orig_patent_app_number] => 12765011 [rel_patent_id] =>[rel_patent_doc_number] =>)