Nanci N. Wong

Array ( [id] => 12891370 [patent_doc_number] => 20180188965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-05 [patent_title] => WRITE COMMAND OVERLAP DETECTION [patent_app_type] => utility [patent_app_number] => 15/906315 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15906315 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12820048 [patent_doc_number] => 20180165188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => Method and Apparatus for Providing Improved Garbage Collection Process In Solid State Drive [patent_app_type] => utility [patent_app_number] => 15/894587 [patent_app_country] => US [patent_app_date] => 2018-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7268 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15894587 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14091575 [patent_doc_number] => 10241690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-26 [patent_title] => Shifting wearout of storage disks [patent_app_type] => utility [patent_app_number] => 15/872152 [patent_app_country] => US [patent_app_date] => 2018-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 15407 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15872152 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15731101 [patent_doc_number] => 10613979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Accelerator memory coherency with single state machine [patent_app_type] => utility [patent_app_number] => 15/826970 [patent_app_country] => US [patent_app_date] => 2017-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826970 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14378917 [patent_doc_number] => 20190163371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => NEXT GENERATION STORAGE CONTROLLER IN HYBRID ENVIRONMENTS [patent_app_type] => utility [patent_app_number] => 15/826801 [patent_app_country] => US [patent_app_date] => 2017-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9646 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826801 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12868468 [patent_doc_number] => 20180181331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => SEMICONDUCTOR DEVICE, SECURITY PROCESS EXECUTION DEVICE, AND SECURITY PROCESS EXECUTION METHOD [patent_app_type] => utility [patent_app_number] => 15/826809 [patent_app_country] => US [patent_app_date] => 2017-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826809 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12868504 [patent_doc_number] => 20180181343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => INFORMATION PROCESSING APPARATUS, NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM HAVING STORED THEREIN A PROGRAM FOR CONTROLLING STORAGE, AND METHOD FOR CONTROLLING STORAGE [patent_app_type] => utility [patent_app_number] => 15/826800 [patent_app_country] => US [patent_app_date] => 2017-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10894 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826800 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14378919 [patent_doc_number] => 20190163372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => PERFORMING BACKUP OPERATIONS USING REPLICAS [patent_app_type] => utility [patent_app_number] => 15/826835 [patent_app_country] => US [patent_app_date] => 2017-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826835 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14379353 [patent_doc_number] => 20190163589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => MODIFYING ASPECTS OF A STORAGE SYSTEM ASSOCIATED WITH DATA MIRRORING [patent_app_type] => utility [patent_app_number] => 15/827072 [patent_app_country] => US [patent_app_date] => 2017-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13459 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15827072 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12796819 [patent_doc_number] => 20180157442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => COMPUTER-IMPLEMENTED METHOD AND A SYSTEM FOR ENCODING A STACK APPLICATION MEMORY STATE USING SHADOW MEMORY [patent_app_type] => utility [patent_app_number] => 15/826571 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826571 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14378933 [patent_doc_number] => 20190163379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => PREVENT DISK HARDWARE FAILURE FOR CLOUD APPLICATIONS [patent_app_type] => utility [patent_app_number] => 15/826602 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7633 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826602 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12775210 [patent_doc_number] => 20180150238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => ALLOCATION OF MEMORY REGIONS OF A NONVOLATILE SEMICONDUCTOR MEMORY FOR STREAM-BASED DATA WRITING [patent_app_type] => utility [patent_app_number] => 15/826415 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15021 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826415 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12591018 [patent_doc_number] => 20180088835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => SHIFTING WEAROUT OF STORAGE DISKS [patent_app_type] => utility [patent_app_number] => 15/808190 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15808190 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12207414 [patent_doc_number] => 20180052640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'FILE MANAGEMENT IN A FILE SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/802889 [patent_app_country] => US [patent_app_date] => 2017-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5085 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15802889 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13995215 [patent_doc_number] => 20190066765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => DRAM AND METHOD FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/684524 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8259 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684524 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14886621 [patent_doc_number] => 10423349 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Logical and physical address field size reduction by alignment-constrained writing technique [patent_app_type] => utility [patent_app_number] => 15/684206 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5328 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684206 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13626785 [patent_doc_number] => 20180364944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => PERFORMING BACKGROUND FUNCTIONS USING LOGIC INTEGRATED WITH A MEMORY [patent_app_type] => utility [patent_app_number] => 15/684659 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684659 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15701167 [patent_doc_number] => 10606760 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-31 [patent_title] => Nonvolatile memory devices and methods of controlling the same [patent_app_type] => utility [patent_app_number] => 15/684252 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5818 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684252 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17308909 [patent_doc_number] => 11210019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Memory with virtual page size [patent_app_type] => utility [patent_app_number] => 15/684773 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 16056 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684773 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15137097 [patent_doc_number] => 10482016 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Providing private cache allocation for power-collapsed processor cores in processor-based systems [patent_app_type] => utility [patent_app_number] => 15/684418 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5758 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684418 [rel_patent_id] =>[rel_patent_doc_number] =>)