Search

Nancy V Le

Director (ID: 2657, Phone: (571)272-4056 , Office: P/2400 )

Most Active Art Unit
2108
Art Unit(s)
2853, 2861, 2108, 2107, 2858
Total Applications
431
Issued Applications
255
Pending Applications
24
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18221891 [patent_doc_number] => 20230060885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/893543 [patent_app_country] => US [patent_app_date] => 2022-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20800 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17893543 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/893543
SEMICONDUCTOR DEVICE Aug 22, 2022 Pending
Array ( [id] => 17993760 [patent_doc_number] => 20220359797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => WAVELENGTH CONVERSION COMPONENT [patent_app_type] => utility [patent_app_number] => 17/873124 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873124 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873124
Wavelength conversion component Jul 24, 2022 Issued
Array ( [id] => 18008847 [patent_doc_number] => 20220367614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => AVALANCHE-PROTECTED TRANSISTORS USING A BOTTOM BREAKDOWN CURRENT PATH AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/867843 [patent_app_country] => US [patent_app_date] => 2022-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13458 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17867843 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/867843
AVALANCHE-PROTECTED TRANSISTORS USING A BOTTOM BREAKDOWN CURRENT PATH AND METHODS OF FORMING THE SAME Jul 18, 2022 Pending
Array ( [id] => 17985970 [patent_doc_number] => 20220352007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => Method For Manufacturing Body-Source-Tied SOI Transistor [patent_app_type] => utility [patent_app_number] => 17/863925 [patent_app_country] => US [patent_app_date] => 2022-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17863925 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/863925
Method for manufacturing body-source-tied SOI transistor Jul 12, 2022 Issued
Array ( [id] => 17949290 [patent_doc_number] => 20220336309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => SEMICONDUCTOR PACKAGE, INTEGRATED OPTICAL COMMUNICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 17/857166 [patent_app_country] => US [patent_app_date] => 2022-07-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10775 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857166 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/857166
Semiconductor package, integrated optical communication system Jul 3, 2022 Issued
Array ( [id] => 17933609 [patent_doc_number] => 20220328735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => LIGHT EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 17/852327 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9502 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852327 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852327
Light emitting device Jun 27, 2022 Issued
Array ( [id] => 18849043 [patent_doc_number] => 20230411447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE COMPRISING A LATERAL SUPER JUNCTION FIELD EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/845715 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1464 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845715 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/845715
SEMICONDUCTOR DEVICE COMPRISING A LATERAL SUPER JUNCTION FIELD EFFECT TRANSISTOR Jun 20, 2022 Pending
Array ( [id] => 17900857 [patent_doc_number] => 20220310519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => INTEGRATED FAN-OUT (INFO) PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/840636 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5713 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840636 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/840636
INTEGRATED FAN-OUT (INFO) PACKAGE STRUCTURE Jun 14, 2022 Pending
Array ( [id] => 17811112 [patent_doc_number] => 20220262947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => LDMOS TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/735899 [patent_app_country] => US [patent_app_date] => 2022-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17735899 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/735899
LDMOS transistor and method for manufacturing the same May 2, 2022 Issued
17/735450 SOI Structures Including an Indium Retrograde P-Well for Improved RF-SOI Switches May 2, 2022 Abandoned
Array ( [id] => 18796967 [patent_doc_number] => 11830802 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Display device having connection unit [patent_app_type] => utility [patent_app_number] => 17/711890 [patent_app_country] => US [patent_app_date] => 2022-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 23 [patent_no_of_words] => 11530 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17711890 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/711890
Display device having connection unit Mar 31, 2022 Issued
Array ( [id] => 17708728 [patent_doc_number] => 20220208736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => THREE-DIMENSIONAL STACKING SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/697141 [patent_app_country] => US [patent_app_date] => 2022-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4472 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17697141 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/697141
THREE-DIMENSIONAL STACKING SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING THE SAME Mar 16, 2022 Pending
Array ( [id] => 18570524 [patent_doc_number] => 20230260861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => SEMICONDUCTOR PACKAGES WITH INCREASED POWER HANDLING [patent_app_type] => utility [patent_app_number] => 17/670174 [patent_app_country] => US [patent_app_date] => 2022-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17670174 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/670174
SEMICONDUCTOR PACKAGES WITH INCREASED POWER HANDLING Feb 10, 2022 Pending
Array ( [id] => 17599389 [patent_doc_number] => 20220148963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => METHOD OF FORMING INTEGRATED CIRCUIT DEVICE WITH BONDING STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/582220 [patent_app_country] => US [patent_app_date] => 2022-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7457 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17582220 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/582220
Method of forming integrated circuit device with bonding structure Jan 23, 2022 Issued
Array ( [id] => 18456561 [patent_doc_number] => 20230197843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/578383 [patent_app_country] => US [patent_app_date] => 2022-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7602 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17578383 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/578383
Semiconductor device and manufacturing method thereof Jan 17, 2022 Issued
Array ( [id] => 18500518 [patent_doc_number] => 20230223312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => SEMICONDUCTOR PACKAGE HAVING A THERMALLY AND ELECTRICALLY CONDUCTIVE SPACER [patent_app_type] => utility [patent_app_number] => 17/572858 [patent_app_country] => US [patent_app_date] => 2022-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17572858 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/572858
SEMICONDUCTOR PACKAGE HAVING A THERMALLY AND ELECTRICALLY CONDUCTIVE SPACER Jan 10, 2022 Pending
Array ( [id] => 17551431 [patent_doc_number] => 20220122773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/567655 [patent_app_country] => US [patent_app_date] => 2022-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17567655 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/567655
Semiconductor device and method for fabricating the same Jan 2, 2022 Issued
Array ( [id] => 18639510 [patent_doc_number] => 11764131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/562965 [patent_app_country] => US [patent_app_date] => 2021-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5218 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17562965 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/562965
Semiconductor device and manufacturing method thereof Dec 26, 2021 Issued
Array ( [id] => 18456270 [patent_doc_number] => 20230197552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => Electronic Package Structure With Offset Stacked Chips And Top And Bottom Side Cooling Lid [patent_app_type] => utility [patent_app_number] => 17/557529 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7646 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17557529 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/557529
Electronic package structure with offset stacked chips and top and bottom side cooling lid Dec 20, 2021 Issued
Array ( [id] => 17523073 [patent_doc_number] => 20220108922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => FULLY ALIGNED TOP VIAS [patent_app_type] => utility [patent_app_number] => 17/551531 [patent_app_country] => US [patent_app_date] => 2021-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4992 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17551531 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/551531
Fully aligned top vias Dec 14, 2021 Issued
Menu