Search

Nancy V Le

Director (ID: 1982, Phone: (571)272-4056 , Office: P/2400 )

Most Active Art Unit
2108
Art Unit(s)
2108, 2853, 2858, 2107, 2861
Total Applications
431
Issued Applications
255
Pending Applications
24
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16286291 [patent_doc_number] => 20200279893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-03 [patent_title] => DISPLAY SUBSTRATE, METHOD FOR MANUFACTURING SAME, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/646876 [patent_app_country] => US [patent_app_date] => 2019-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6226 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16646876 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/646876
Display substrate, method for manufacturing same, and display device Apr 17, 2019 Issued
Array ( [id] => 14691637 [patent_doc_number] => 20190244934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => MANUFACTURING METHOD AND A RELATED STACKABLE CHIP PACKAGE [patent_app_type] => utility [patent_app_number] => 16/386276 [patent_app_country] => US [patent_app_date] => 2019-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1922 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16386276 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/386276
Manufacturing method and a related stackable chip package Apr 16, 2019 Issued
Array ( [id] => 14691863 [patent_doc_number] => 20190245047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => TRANSISTOR WITH SOURCE FIELD PLATES AND NON-OVERLAPPING GATE RUNNER LAYERS [patent_app_type] => utility [patent_app_number] => 16/383857 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16383857 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/383857
Transistor with source field plates and non-overlapping gate runner layers Apr 14, 2019 Issued
Array ( [id] => 15170021 [patent_doc_number] => 10490514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/382283 [patent_app_country] => US [patent_app_date] => 2019-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 7853 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16382283 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/382283
Semiconductor devices Apr 11, 2019 Issued
Array ( [id] => 15388749 [patent_doc_number] => 10535573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-14 [patent_title] => System and method for test key characterizing wafer processing state [patent_app_type] => utility [patent_app_number] => 16/383416 [patent_app_country] => US [patent_app_date] => 2019-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 29 [patent_no_of_words] => 6543 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16383416 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/383416
System and method for test key characterizing wafer processing state Apr 11, 2019 Issued
Array ( [id] => 16379507 [patent_doc_number] => 20200328350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => RESISTIVE RANDOM ACCESS MEMORY (RRAM) DEVICES EMPLOYING BOUNDED FILAMENT FORMATION REGIONS, AND RELATED METHODS OF FABRICATING [patent_app_type] => utility [patent_app_number] => 16/382880 [patent_app_country] => US [patent_app_date] => 2019-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16382880 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/382880
RESISTIVE RANDOM ACCESS MEMORY (RRAM) DEVICES EMPLOYING BOUNDED FILAMENT FORMATION REGIONS, AND RELATED METHODS OF FABRICATING Apr 11, 2019 Abandoned
Array ( [id] => 15315535 [patent_doc_number] => 10522483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-31 [patent_title] => Package assembly for embedded die and associated techniques and configurations [patent_app_type] => utility [patent_app_number] => 16/380529 [patent_app_country] => US [patent_app_date] => 2019-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 8782 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16380529 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/380529
Package assembly for embedded die and associated techniques and configurations Apr 9, 2019 Issued
Array ( [id] => 16521769 [patent_doc_number] => 10872995 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-22 [patent_title] => Avalanche diode along with vertical PN junction and method for manufacturing the same field [patent_app_type] => utility [patent_app_number] => 16/368648 [patent_app_country] => US [patent_app_date] => 2019-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 5331 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16368648 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/368648
Avalanche diode along with vertical PN junction and method for manufacturing the same field Mar 27, 2019 Issued
Array ( [id] => 17092898 [patent_doc_number] => 11121096 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Active control of electronic package warpage [patent_app_type] => utility [patent_app_number] => 16/360402 [patent_app_country] => US [patent_app_date] => 2019-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10952 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16360402 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/360402
Active control of electronic package warpage Mar 20, 2019 Issued
Array ( [id] => 15030671 [patent_doc_number] => 20190326340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => OPTOELECTRONIC MODULES HAVING A SILICON SUBSTRATE, AND FABRICATION METHODS FOR SUCH MODULES [patent_app_type] => utility [patent_app_number] => 16/357627 [patent_app_country] => US [patent_app_date] => 2019-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3285 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16357627 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/357627
Optoelectronic modules having a silicon substrate, and fabrication methods for such modules Mar 18, 2019 Issued
Array ( [id] => 17373871 [patent_doc_number] => 20220028923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => LIGHT EMITTING DEVICE AND DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/277284 [patent_app_country] => US [patent_app_date] => 2019-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22716 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17277284 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/277284
Light emitting device and display device comprising partition walls between emission areas Mar 18, 2019 Issued
Array ( [id] => 16316551 [patent_doc_number] => 20200295289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => Organic Light-Emitting Diode with Enhanced Light-Emitting Efficiency and Color Purity [patent_app_type] => utility [patent_app_number] => 16/354826 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4495 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16354826 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/354826
Organic light-emitting diode with enhanced light-emitting efficiency and color purity Mar 14, 2019 Issued
Array ( [id] => 16172977 [patent_doc_number] => 10714556 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Transistor substrate and display device including the same [patent_app_type] => utility [patent_app_number] => 16/296755 [patent_app_country] => US [patent_app_date] => 2019-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 8441 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16296755 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/296755
Transistor substrate and display device including the same Mar 7, 2019 Issued
Array ( [id] => 14875529 [patent_doc_number] => 20190288006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => Backside Charge Control for FET Integrated Circuits [patent_app_type] => utility [patent_app_number] => 16/297402 [patent_app_country] => US [patent_app_date] => 2019-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16297402 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/297402
Backside Charge Control for FET Integrated Circuits Mar 7, 2019 Abandoned
Array ( [id] => 14842327 [patent_doc_number] => 20190279564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 16/295361 [patent_app_country] => US [patent_app_date] => 2019-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8199 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16295361 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/295361
Display apparatus comprising color accuracy enhancement transistor or brightness boosting transistor Mar 6, 2019 Issued
Array ( [id] => 17319147 [patent_doc_number] => 20210408197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => DISPLAY APPARATUS AND PREPARATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/484623 [patent_app_country] => US [patent_app_date] => 2019-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5584 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16484623 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/484623
Display apparatus and preparation method thereof Mar 5, 2019 Issued
Array ( [id] => 14510205 [patent_doc_number] => 20190198757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => RESISTIVE MEMORY WITH AMORPHOUS SILICON FILAMENTS [patent_app_type] => utility [patent_app_number] => 16/292894 [patent_app_country] => US [patent_app_date] => 2019-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16292894 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/292894
Resistive memory with amorphous silicon filaments Mar 4, 2019 Issued
Array ( [id] => 16760117 [patent_doc_number] => 10978675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Display device solidified against external impact [patent_app_type] => utility [patent_app_number] => 16/286039 [patent_app_country] => US [patent_app_date] => 2019-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 15619 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16286039 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/286039
Display device solidified against external impact Feb 25, 2019 Issued
Array ( [id] => 14476637 [patent_doc_number] => 20190189968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => ORGANIC LIGHT EMITTING DISPLAY DEVICE HAVING A RESONANCE STRUCTURE OF PROPER INTERNAL REFLECTION BY INCLUDING A LIGHT EXTRACTION REDUCTION PREVENTING LAYER [patent_app_type] => utility [patent_app_number] => 16/284781 [patent_app_country] => US [patent_app_date] => 2019-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6773 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16284781 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/284781
Organic light emitting display device having a resonance structure of proper internal reflection by including a light extraction reduction preventing layer Feb 24, 2019 Issued
Array ( [id] => 16471710 [patent_doc_number] => 20200373248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => ELECTRONIC COMPONENT PACKAGE AND METHOD FOR PRODUCING SAME [patent_app_type] => utility [patent_app_number] => 16/962300 [patent_app_country] => US [patent_app_date] => 2019-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9225 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16962300 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/962300
Electronic component package including stacked shield layers and method for producing same Feb 20, 2019 Issued
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