Search

Nancy V Le

Director (ID: 1982, Phone: (571)272-4056 , Office: P/2400 )

Most Active Art Unit
2108
Art Unit(s)
2108, 2853, 2858, 2107, 2861
Total Applications
431
Issued Applications
255
Pending Applications
24
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15077771 [patent_doc_number] => 10468385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Semiconductor structure including plurality of chips along with air gap and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/826545 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4999 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826545 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/826545
Semiconductor structure including plurality of chips along with air gap and manufacturing method thereof Nov 28, 2017 Issued
Array ( [id] => 16187228 [patent_doc_number] => 10720570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-21 [patent_title] => Magnetic sensor using spin hall effect [patent_app_type] => utility [patent_app_number] => 15/826578 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 6957 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826578 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/826578
Magnetic sensor using spin hall effect Nov 28, 2017 Issued
Array ( [id] => 12849775 [patent_doc_number] => 20180175098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => IMAGE SENSOR AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 15/820534 [patent_app_country] => US [patent_app_date] => 2017-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820534 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/820534
Image sensor including doped regions and manufacturing method therefor Nov 21, 2017 Issued
Array ( [id] => 13470531 [patent_doc_number] => 20180286808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => SEMICONDUCTOR DEVICE HAVING CONTACTS WITH VARYING WIDTHS [patent_app_type] => utility [patent_app_number] => 15/820509 [patent_app_country] => US [patent_app_date] => 2017-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820509 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/820509
Semiconductor device having contacts with varying widths Nov 21, 2017 Issued
Array ( [id] => 12849727 [patent_doc_number] => 20180175082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => IMAGE SENSOR AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 15/820547 [patent_app_country] => US [patent_app_date] => 2017-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15820547 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/820547
IMAGE SENSOR AND MANUFACTURING METHOD THEREFOR Nov 21, 2017 Abandoned
Array ( [id] => 14036301 [patent_doc_number] => 10229906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => Semiconductor device including insulating film having opening portion and conductive film in the opening portion [patent_app_type] => utility [patent_app_number] => 15/814569 [patent_app_country] => US [patent_app_date] => 2017-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 69 [patent_figures_cnt] => 108 [patent_no_of_words] => 48194 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15814569 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/814569
Semiconductor device including insulating film having opening portion and conductive film in the opening portion Nov 15, 2017 Issued
Array ( [id] => 13598787 [patent_doc_number] => 20180350942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => THROUGH-SUBSTRATE VIA POWER GATING AND DELIVERY BIPOLAR TRANSISTOR [patent_app_type] => utility [patent_app_number] => 15/805210 [patent_app_country] => US [patent_app_date] => 2017-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4965 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15805210 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/805210
Through-substrate via power gating and delivery bipolar transistor Nov 6, 2017 Issued
Array ( [id] => 13963405 [patent_doc_number] => 20190058047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-21 [patent_title] => VERTICAL TRANSISTORS HAVING IMPROVED GATE LENGTH CONTROL [patent_app_type] => utility [patent_app_number] => 15/803935 [patent_app_country] => US [patent_app_date] => 2017-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7995 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15803935 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/803935
Vertical transistors having improved gate length control Nov 5, 2017 Issued
Array ( [id] => 12188798 [patent_doc_number] => 20180047734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'TRANSISTOR STRUCTURE HAVING N-TYPE AND P-TYPE ELONGATED REGIONS INTERSECTING UNDER COMMON GATE' [patent_app_type] => utility [patent_app_number] => 15/792527 [patent_app_country] => US [patent_app_date] => 2017-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4334 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15792527 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/792527
Transistor structure having multiple n-type and/or p-type elongated regions intersecting under common gate Oct 23, 2017 Issued
Array ( [id] => 12263930 [patent_doc_number] => 20180083126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'Method Of Junction Control For Lateral Bipolar Junction Transistor' [patent_app_type] => utility [patent_app_number] => 15/791504 [patent_app_country] => US [patent_app_date] => 2017-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5063 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15791504 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/791504
Method of junction control for lateral bipolar junction transistor Oct 23, 2017 Issued
Array ( [id] => 14843295 [patent_doc_number] => 20190280048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => DISPLAY DEVICE AND METHOD FOR PRODUCING SUCH A DEVICE [patent_app_type] => utility [patent_app_number] => 16/335149 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5538 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16335149 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/335149
Monolithic display device including integrated control circuit and method for producing the same Oct 12, 2017 Issued
Array ( [id] => 12717280 [patent_doc_number] => 20180130926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => LIGHT EMITTING DIODE [patent_app_type] => utility [patent_app_number] => 15/727545 [patent_app_country] => US [patent_app_date] => 2017-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30294 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15727545 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/727545
LIGHT EMITTING DIODE Oct 5, 2017 Abandoned
Array ( [id] => 12122684 [patent_doc_number] => 20180006270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'ORGANIC LIGHT EMITTING DIODES DISPLAYS AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/708259 [patent_app_country] => US [patent_app_date] => 2017-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6276 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15708259 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/708259
Organic light emitting diodes displays and manufacturing method thereof Sep 18, 2017 Issued
Array ( [id] => 16356570 [patent_doc_number] => 10797088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Semiconductor device, display apparatus, method of manufacturing semiconductor device and method of manufacturing display apparatus [patent_app_type] => utility [patent_app_number] => 15/704076 [patent_app_country] => US [patent_app_date] => 2017-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 39 [patent_no_of_words] => 8406 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15704076 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/704076
Semiconductor device, display apparatus, method of manufacturing semiconductor device and method of manufacturing display apparatus Sep 13, 2017 Issued
Array ( [id] => 12223716 [patent_doc_number] => 20180062075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'RESISTIVE MEMORY CELL WITH INTRINSIC CURRENT CONTROL' [patent_app_type] => utility [patent_app_number] => 15/676231 [patent_app_country] => US [patent_app_date] => 2017-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13058 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15676231 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/676231
Resistive memory cell with intrinsic current control Aug 13, 2017 Issued
Array ( [id] => 12990127 [patent_doc_number] => 20170345783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => BUMP ON PAD (BOP) BONDING STRUCTURE IN SEMICONDUCTOR PACKAGED DEVICE [patent_app_type] => utility [patent_app_number] => 15/675264 [patent_app_country] => US [patent_app_date] => 2017-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6220 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15675264 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/675264
Bump on pad (BOP) bonding structure in semiconductor packaged device Aug 10, 2017 Issued
Array ( [id] => 15078219 [patent_doc_number] => 10468611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Flexible display device with metallic material portion including recess and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/656732 [patent_app_country] => US [patent_app_date] => 2017-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 5703 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15656732 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/656732
Flexible display device with metallic material portion including recess and method of manufacturing the same Jul 20, 2017 Issued
Array ( [id] => 12138049 [patent_doc_number] => 20180016132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'LAYER STRUCTURE AND METHOD OF MANUFACTURING A LAYER STRUCTURE' [patent_app_type] => utility [patent_app_number] => 15/646161 [patent_app_country] => US [patent_app_date] => 2017-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 9353 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15646161 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/646161
Layer structure and method of manufacturing a layer structure Jul 10, 2017 Issued
Array ( [id] => 16264737 [patent_doc_number] => 10756185 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Semiconductor device including vertical channel layer and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/646184 [patent_app_country] => US [patent_app_date] => 2017-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 10091 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15646184 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/646184
Semiconductor device including vertical channel layer and method of manufacturing the same Jul 10, 2017 Issued
Array ( [id] => 12005498 [patent_doc_number] => 20170309653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'TFT BACKPLATE STRUCTURE COMPRISING TRANSISTORS HAVING GATE ISOLATION LAYERS OF DIFFERENT THICKNESSES AND MANUFACTURE METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/644754 [patent_app_country] => US [patent_app_date] => 2017-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3816 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15644754 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/644754
TFT backplate structure comprising transistors having gate isolation layers of different thicknesses and manufacture method thereof Jul 7, 2017 Issued
Menu