Search

Nancy V Le

Director (ID: 1982, Phone: (571)272-4056 , Office: P/2400 )

Most Active Art Unit
2108
Art Unit(s)
2108, 2853, 2858, 2107, 2861
Total Applications
431
Issued Applications
255
Pending Applications
24
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14333229 [patent_doc_number] => 10297643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Organic light emitting display including optical assistant transporting layer and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/333748 [patent_app_country] => US [patent_app_date] => 2016-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4899 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15333748 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/333748
Organic light emitting display including optical assistant transporting layer and method of manufacturing the same Oct 24, 2016 Issued
Array ( [id] => 11569820 [patent_doc_number] => 20170108464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'SYSTEM AND METHOD FOR FORMING MICROWELLS' [patent_app_type] => utility [patent_app_number] => 15/333023 [patent_app_country] => US [patent_app_date] => 2016-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4097 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15333023 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/333023
SYSTEM AND METHOD FOR FORMING MICROWELLS Oct 23, 2016 Abandoned
Array ( [id] => 12534858 [patent_doc_number] => 10008477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Microelectronic element with bond elements to encapsulation surface [patent_app_type] => utility [patent_app_number] => 15/286086 [patent_app_country] => US [patent_app_date] => 2016-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 9945 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 437 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15286086 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/286086
Microelectronic element with bond elements to encapsulation surface Oct 4, 2016 Issued
Array ( [id] => 12257107 [patent_doc_number] => 09929258 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-27 [patent_title] => 'Method of junction control for lateral bipolar junction transistor' [patent_app_type] => utility [patent_app_number] => 15/270144 [patent_app_country] => US [patent_app_date] => 2016-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5021 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15270144 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/270144
Method of junction control for lateral bipolar junction transistor Sep 19, 2016 Issued
Array ( [id] => 13293651 [patent_doc_number] => 10158026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Semiconductor device including oxide semiconductor stacked layers [patent_app_type] => utility [patent_app_number] => 15/262547 [patent_app_country] => US [patent_app_date] => 2016-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 34 [patent_no_of_words] => 20501 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15262547 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/262547
Semiconductor device including oxide semiconductor stacked layers Sep 11, 2016 Issued
Array ( [id] => 11367101 [patent_doc_number] => 20170005082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/261558 [patent_app_country] => US [patent_app_date] => 2016-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8837 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15261558 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/261558
Semiconductor device including electrostatic discharge (ESD) protection circuit and manufacturing method thereof Sep 8, 2016 Issued
Array ( [id] => 13682991 [patent_doc_number] => 20160380232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-29 [patent_title] => ORGANIC LIGHT EMITTING DIODES DISPLAYS AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/260093 [patent_app_country] => US [patent_app_date] => 2016-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6170 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15260093 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/260093
Organic light emitting diodes displays including a polarization film and manufacturing method thereof Sep 7, 2016 Issued
Array ( [id] => 11475754 [patent_doc_number] => 20170062536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'High Resolution Organic Light-Emitting Diode Devices, Displays, and Related Method' [patent_app_type] => utility [patent_app_number] => 15/254562 [patent_app_country] => US [patent_app_date] => 2016-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 34645 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15254562 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/254562
High resolution organic light-emitting diode devices, displays, and related method Aug 31, 2016 Issued
Array ( [id] => 11353650 [patent_doc_number] => 20160372390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-22 [patent_title] => 'System and Method for Test Key Characterizing Wafer Processing State' [patent_app_type] => utility [patent_app_number] => 15/250764 [patent_app_country] => US [patent_app_date] => 2016-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6224 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15250764 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/250764
System and method for test key characterizing wafer processing state Aug 28, 2016 Issued
Array ( [id] => 11495430 [patent_doc_number] => 20170069615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-09 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/239216 [patent_app_country] => US [patent_app_date] => 2016-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11305 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15239216 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/239216
SEMICONDUCTOR DEVICE Aug 16, 2016 Abandoned
Array ( [id] => 12208500 [patent_doc_number] => 20180053725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'FORMATION OF ADVANCED INTERCONNECTS' [patent_app_type] => utility [patent_app_number] => 15/239198 [patent_app_country] => US [patent_app_date] => 2016-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4320 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15239198 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/239198
Formation of advanced interconnects including set of metal conductor structures in patterned dielectric layer Aug 16, 2016 Issued
Array ( [id] => 11459989 [patent_doc_number] => 20170053895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-23 [patent_title] => 'WIRE BONDING METHODS AND SYSTEMS INCORPORATING METAL NANOPARTICLES' [patent_app_type] => utility [patent_app_number] => 15/233912 [patent_app_country] => US [patent_app_date] => 2016-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11962 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15233912 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/233912
Wire bonding methods and systems incorporating metal nanoparticles Aug 9, 2016 Issued
Array ( [id] => 11502928 [patent_doc_number] => 20170077114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/233671 [patent_app_country] => US [patent_app_date] => 2016-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4998 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15233671 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/233671
SEMICONDUCTOR MEMORY DEVICE Aug 9, 2016 Abandoned
Array ( [id] => 11502855 [patent_doc_number] => 20170077040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/233915 [patent_app_country] => US [patent_app_date] => 2016-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6231 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15233915 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/233915
Semiconductor device including electromagnetic interference (EMI) shielding layer and method for manufacturing the semiconductor device Aug 9, 2016 Issued
Array ( [id] => 14064335 [patent_doc_number] => 10236474 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Organic light emitting display device having a resonance structure of proper internal reflection by including a light extraction reduction preventing layer [patent_app_type] => utility [patent_app_number] => 15/227830 [patent_app_country] => US [patent_app_date] => 2016-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 6759 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15227830 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/227830
Organic light emitting display device having a resonance structure of proper internal reflection by including a light extraction reduction preventing layer Aug 2, 2016 Issued
Array ( [id] => 11990309 [patent_doc_number] => 20170294465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-12 [patent_title] => 'Film Patterning Method' [patent_app_type] => utility [patent_app_number] => 15/511519 [patent_app_country] => US [patent_app_date] => 2016-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3919 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15511519 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/511519
Film Patterning Method Jul 27, 2016 Abandoned
Array ( [id] => 13257521 [patent_doc_number] => 10141458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-27 [patent_title] => Vertical gate guard ring for single photon avalanche diode pitch minimization [patent_app_type] => utility [patent_app_number] => 15/216049 [patent_app_country] => US [patent_app_date] => 2016-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3728 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15216049 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/216049
Vertical gate guard ring for single photon avalanche diode pitch minimization Jul 20, 2016 Issued
Array ( [id] => 11564858 [patent_doc_number] => 09627454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Organic light emitting display device having dummy sub-pixels' [patent_app_type] => utility [patent_app_number] => 15/202305 [patent_app_country] => US [patent_app_date] => 2016-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 6420 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15202305 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/202305
Organic light emitting display device having dummy sub-pixels Jul 4, 2016 Issued
Array ( [id] => 11883887 [patent_doc_number] => 09755071 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-05 [patent_title] => 'Merged gate for vertical transistors' [patent_app_type] => utility [patent_app_number] => 15/198603 [patent_app_country] => US [patent_app_date] => 2016-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 7638 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15198603 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/198603
Merged gate for vertical transistors Jun 29, 2016 Issued
Array ( [id] => 12122240 [patent_doc_number] => 20180005826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'FORMING A SILICON BASED LAYER IN A TRENCH TO PREVENT CORNER ROUNDING' [patent_app_type] => utility [patent_app_number] => 15/198570 [patent_app_country] => US [patent_app_date] => 2016-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2512 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15198570 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/198570
FORMING A SILICON BASED LAYER IN A TRENCH TO PREVENT CORNER ROUNDING Jun 29, 2016 Abandoned
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