Search

Nancy V Le

Director (ID: 1982, Phone: (571)272-4056 , Office: P/2400 )

Most Active Art Unit
2108
Art Unit(s)
2108, 2853, 2858, 2107, 2861
Total Applications
431
Issued Applications
255
Pending Applications
24
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9883111 [patent_doc_number] => 08969878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Semiconductor device and method for manufacturing the device' [patent_app_type] => utility [patent_app_number] => 13/733936 [patent_app_country] => US [patent_app_date] => 2013-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 7747 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13733936 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/733936
Semiconductor device and method for manufacturing the device Jan 3, 2013 Issued
Array ( [id] => 9824031 [patent_doc_number] => 08933518 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-13 [patent_title] => 'Stacked power semiconductor device using dual lead frame' [patent_app_type] => utility [patent_app_number] => 13/734201 [patent_app_country] => US [patent_app_date] => 2013-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 5755 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13734201 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/734201
Stacked power semiconductor device using dual lead frame Jan 3, 2013 Issued
Array ( [id] => 9869751 [patent_doc_number] => 08957526 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-17 [patent_title] => 'Semiconductor chips having through silicon vias and related fabrication methods and semiconductor packages' [patent_app_type] => utility [patent_app_number] => 13/733923 [patent_app_country] => US [patent_app_date] => 2013-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 29 [patent_no_of_words] => 11525 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13733923 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/733923
Semiconductor chips having through silicon vias and related fabrication methods and semiconductor packages Jan 3, 2013 Issued
Array ( [id] => 9530586 [patent_doc_number] => 08754462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-17 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/733723 [patent_app_country] => US [patent_app_date] => 2013-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3306 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13733723 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/733723
Semiconductor device Jan 2, 2013 Issued
Array ( [id] => 10165342 [patent_doc_number] => 09196573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-24 [patent_title] => 'Bump on pad (BOP) bonding structure' [patent_app_type] => utility [patent_app_number] => 13/733692 [patent_app_country] => US [patent_app_date] => 2013-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 5121 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13733692 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/733692
Bump on pad (BOP) bonding structure Jan 2, 2013 Issued
Array ( [id] => 9965296 [patent_doc_number] => 09012913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-21 [patent_title] => 'Semiconductor device and method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/733536 [patent_app_country] => US [patent_app_date] => 2013-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 51 [patent_no_of_words] => 17164 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13733536 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/733536
Semiconductor device and method for manufacturing semiconductor device Jan 2, 2013 Issued
Array ( [id] => 8987057 [patent_doc_number] => 20130214338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-22 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/733596 [patent_app_country] => US [patent_app_date] => 2013-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9906 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13733596 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/733596
SEMICONDUCTOR DEVICE Jan 2, 2013 Abandoned
Array ( [id] => 9565901 [patent_doc_number] => 20140183614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/733147 [patent_app_country] => US [patent_app_date] => 2013-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4409 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13733147 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/733147
SEMICONDUCTOR DEVICE Jan 2, 2013 Abandoned
Array ( [id] => 8973741 [patent_doc_number] => 20130207171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-15 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING CAPACITOR INCLUDING HIGH-K DIELECTRIC' [patent_app_type] => utility [patent_app_number] => 13/733554 [patent_app_country] => US [patent_app_date] => 2013-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8597 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13733554 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/733554
SEMICONDUCTOR DEVICE HAVING CAPACITOR INCLUDING HIGH-K DIELECTRIC Jan 2, 2013 Abandoned
Array ( [id] => 9565927 [patent_doc_number] => 20140183640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'GATELESS FINFET' [patent_app_type] => utility [patent_app_number] => 13/733270 [patent_app_country] => US [patent_app_date] => 2013-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4610 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13733270 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/733270
GATELESS FINFET Jan 2, 2013 Abandoned
Array ( [id] => 10897953 [patent_doc_number] => 08921167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-30 [patent_title] => 'Modified via bottom for BEOL via efuse' [patent_app_type] => utility [patent_app_number] => 13/732466 [patent_app_country] => US [patent_app_date] => 2013-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5987 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13732466 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/732466
Modified via bottom for BEOL via efuse Jan 1, 2013 Issued
Array ( [id] => 10590583 [patent_doc_number] => 09312203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Dual damascene structure with liner' [patent_app_type] => utility [patent_app_number] => 13/732825 [patent_app_country] => US [patent_app_date] => 2013-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3749 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13732825 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/732825
Dual damascene structure with liner Jan 1, 2013 Issued
Array ( [id] => 9303775 [patent_doc_number] => 20140042449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'HIGH ELECTRON MOBILITY TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/732746 [patent_app_country] => US [patent_app_date] => 2013-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6291 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13732746 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/732746
High electron mobility transistor Jan 1, 2013 Issued
Array ( [id] => 11307877 [patent_doc_number] => 09515284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-06 [patent_title] => 'Organic electroluminescence element and production method therefor' [patent_app_type] => utility [patent_app_number] => 14/116249 [patent_app_country] => US [patent_app_date] => 2012-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 13317 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14116249 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/116249
Organic electroluminescence element and production method therefor Jul 25, 2012 Issued
Array ( [id] => 9360400 [patent_doc_number] => 20140070272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-13 [patent_title] => 'PHOTODETECTOR FOR ULTRAVIOLET RADIATION, HAVING A HIGH SENSITIVITY AND A LOW DARK CURRENT' [patent_app_type] => utility [patent_app_number] => 14/115453 [patent_app_country] => US [patent_app_date] => 2012-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4901 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14115453 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/115453
Photodetector for ultraviolet radiation, having a high sensitivity and a low dark current Apr 25, 2012 Issued
Array ( [id] => 10035424 [patent_doc_number] => 09076750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-07 [patent_title] => 'Semiconductor wafer and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/005975 [patent_app_country] => US [patent_app_date] => 2012-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9396 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14005975 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/005975
Semiconductor wafer and manufacturing method thereof Apr 2, 2012 Issued
Array ( [id] => 9220157 [patent_doc_number] => 20140014932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'METHOD OF MANUFACTURING ORGANIC ELEMENT, METHOD OF BONDING ORGANIC MOLECULAR CRYSTAL LAYER, METHOD OF MANUFACTURING FINE LINEAR CONDUCTOR, ORGANIC ELEMENT, AND FINE LINEAR CONDUCTOR' [patent_app_type] => utility [patent_app_number] => 14/005960 [patent_app_country] => US [patent_app_date] => 2012-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6911 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14005960 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/005960
METHOD OF MANUFACTURING ORGANIC ELEMENT, METHOD OF BONDING ORGANIC MOLECULAR CRYSTAL LAYER, METHOD OF MANUFACTURING FINE LINEAR CONDUCTOR, ORGANIC ELEMENT, AND FINE LINEAR CONDUCTOR Mar 6, 2012 Abandoned
Array ( [id] => 9534604 [patent_doc_number] => 20140159250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'BBUL TOP SIDE SUBSTRATE LAYER ENABLING DUAL SIDED SILICON INTERCONNECT AND STACKING FLEXIBILITY' [patent_app_type] => utility [patent_app_number] => 13/976394 [patent_app_country] => US [patent_app_date] => 2011-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4157 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976394 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/976394
BBUL TOP SIDE SUBSTRATE LAYER ENABLING DUAL SIDED SILICON INTERCONNECT AND STACKING FLEXIBILITY Dec 30, 2011 Abandoned
Array ( [id] => 11802561 [patent_doc_number] => 09543468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-10 [patent_title] => 'High bandgap III-V alloys for high efficiency optoelectronics' [patent_app_type] => utility [patent_app_number] => 13/878738 [patent_app_country] => US [patent_app_date] => 2011-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3166 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13878738 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/878738
High bandgap III-V alloys for high efficiency optoelectronics Oct 11, 2011 Issued
Array ( [id] => 9327878 [patent_doc_number] => 20140054660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'FILM FORMATION METHOD AND NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/003981 [patent_app_country] => US [patent_app_date] => 2011-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14003981 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/003981
FILM FORMATION METHOD AND NONVOLATILE MEMORY DEVICE Sep 14, 2011 Abandoned
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