
Nanda Bondade
Examiner (ID: 16161)
| Most Active Art Unit | 2912 |
| Art Unit(s) | 2912, 2900, 2902 |
| Total Applications | 5029 |
| Issued Applications | 4983 |
| Pending Applications | 0 |
| Abandoned Applications | 46 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1576285
[patent_doc_number] => 06469343
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-22
[patent_title] => 'Multi-level type nonvolatile semiconductor memory device'
[patent_app_type] => B1
[patent_app_number] => 09/679650
[patent_app_country] => US
[patent_app_date] => 2000-10-05
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 10631
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[pdf_file] => patents/06/469/06469343.pdf
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Array
(
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[patent_doc_number] => 06653699
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[patent_kind] => B1
[patent_issue_date] => 2003-11-25
[patent_title] => 'Polysilicon/Amorphous silicon gate structures for integrated circuit field effect transistors'
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[patent_app_number] => 09/672436
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[patent_app_date] => 2000-09-28
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Array
(
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[patent_doc_number] => 06555862
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[patent_issue_date] => 2003-04-29
[patent_title] => 'Self-aligned buried strap for vertical transistors'
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[patent_app_number] => 09/670745
[patent_app_country] => US
[patent_app_date] => 2000-09-27
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/670745 | Self-aligned buried strap for vertical transistors | Sep 26, 2000 | Issued |
Array
(
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[patent_doc_number] => 06784490
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[patent_kind] => B1
[patent_issue_date] => 2004-08-31
[patent_title] => 'High-voltage MOS transistor'
[patent_app_type] => B1
[patent_app_number] => 09/666156
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[patent_app_date] => 2000-09-19
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Array
(
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[patent_doc_number] => 06878998
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[patent_title] => 'Semiconductor device with region that changes depth across the direction of current flow'
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Array
(
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[patent_issue_date] => 2006-09-05
[patent_title] => 'TFT LCD including a source line having an extension pattern in the channel layer'
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Array
(
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[patent_doc_number] => 06784489
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[patent_issue_date] => 2004-08-31
[patent_title] => 'Method of operating a vertical DMOS transistor with schottky diode body structure'
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[patent_app_number] => 09/659885
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Array
(
[id] => 1229897
[patent_doc_number] => 06696705
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-02-24
[patent_title] => 'Power semiconductor component having a mesa edge termination'
[patent_app_type] => B1
[patent_app_number] => 09/660276
[patent_app_country] => US
[patent_app_date] => 2000-09-12
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/660276 | Power semiconductor component having a mesa edge termination | Sep 11, 2000 | Issued |
Array
(
[id] => 1040890
[patent_doc_number] => 06870189
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[patent_issue_date] => 2005-03-22
[patent_title] => 'Pinch-off type vertical junction field effect transistor and method of manufacturing the same'
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[patent_app_number] => 10/168265
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/168265 | Pinch-off type vertical junction field effect transistor and method of manufacturing the same | Sep 10, 2000 | Issued |
Array
(
[id] => 1272847
[patent_doc_number] => 06653707
[patent_country] => US
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[patent_issue_date] => 2003-11-25
[patent_title] => 'Low leakage Schottky diode'
[patent_app_type] => B1
[patent_app_number] => 09/658222
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/658222 | Low leakage Schottky diode | Sep 7, 2000 | Issued |
Array
(
[id] => 1420481
[patent_doc_number] => 06512269
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[patent_issue_date] => 2003-01-28
[patent_title] => 'High-voltage high-speed SOI MOSFET'
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Array
(
[id] => 7614980
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[patent_title] => 'Semiconductor device including a functional element having a PN junction'
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Array
(
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[patent_title] => 'Stacked-gate flash memory cell with folding gate and increased coupling ratio'
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Array
(
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[patent_title] => 'Polysilicon structures with different resistance values for gate electrodes, resistors, and capacitor plates'
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Array
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Array
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/588308 | Nonvolatile semiconductor device capable of increased electron injection efficiency | Jun 5, 2000 | Issued |