Search

Nanda Bondade

Examiner (ID: 16161)

Most Active Art Unit
2912
Art Unit(s)
2912, 2900, 2902
Total Applications
5029
Issued Applications
4983
Pending Applications
0
Abandoned Applications
46

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4309997 [patent_doc_number] => 06326668 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-04 [patent_title] => 'Semiconductor structure including metal nitride and metal silicide' [patent_app_type] => 1 [patent_app_number] => 9/285573 [patent_app_country] => US [patent_app_date] => 1999-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5914 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/326/06326668.pdf [firstpage_image] =>[orig_patent_app_number] => 285573 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/285573
Semiconductor structure including metal nitride and metal silicide Apr 1, 1999 Issued
Array ( [id] => 7117932 [patent_doc_number] => 20010001494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-05-24 [patent_title] => 'POWER TRENCH MOS-GATED DEVICE AND PROCESS FOR FORMING SAME' [patent_app_type] => new-utility [patent_app_number] => 09/283536 [patent_app_country] => US [patent_app_date] => 1999-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2368 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20010001494.pdf [firstpage_image] =>[orig_patent_app_number] => 09283536 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/283536
POWER TRENCH MOS-GATED DEVICE AND PROCESS FOR FORMING SAME Mar 31, 1999 Abandoned
Array ( [id] => 1217972 [patent_doc_number] => 06707103 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-16 [patent_title] => 'Low voltage rad hard MOSFET' [patent_app_type] => B1 [patent_app_number] => 09/263916 [patent_app_country] => US [patent_app_date] => 1999-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 1719 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/707/06707103.pdf [firstpage_image] =>[orig_patent_app_number] => 09263916 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/263916
Low voltage rad hard MOSFET Mar 4, 1999 Issued
Array ( [id] => 1587851 [patent_doc_number] => 06359318 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Semiconductor device with DMOS and bi-polar transistors' [patent_app_type] => B1 [patent_app_number] => 09/258401 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 6856 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 342 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359318.pdf [firstpage_image] =>[orig_patent_app_number] => 09258401 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/258401
Semiconductor device with DMOS and bi-polar transistors Feb 25, 1999 Issued
Array ( [id] => 4292505 [patent_doc_number] => 06268636 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Operation and biasing for single device equivalent to CMOS' [patent_app_type] => 1 [patent_app_number] => 9/246871 [patent_app_country] => US [patent_app_date] => 1999-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 30 [patent_no_of_words] => 17750 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/268/06268636.pdf [firstpage_image] =>[orig_patent_app_number] => 246871 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/246871
Operation and biasing for single device equivalent to CMOS Feb 7, 1999 Issued
Array ( [id] => 7026651 [patent_doc_number] => 20010013636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-16 [patent_title] => 'A SELF-ALIGNED, SUB-MINIMUM ISOLATION RING' [patent_app_type] => new [patent_app_number] => 09/235776 [patent_app_country] => US [patent_app_date] => 1999-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2939 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20010013636.pdf [firstpage_image] =>[orig_patent_app_number] => 09235776 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/235776
A SELF-ALIGNED, SUB-MINIMUM ISOLATION RING Jan 21, 1999 Abandoned
Array ( [id] => 1419124 [patent_doc_number] => 06525376 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'High withstand voltage insulated gate N-channel field effect transistor' [patent_app_type] => B1 [patent_app_number] => 09/235670 [patent_app_country] => US [patent_app_date] => 1999-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 6152 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/525/06525376.pdf [firstpage_image] =>[orig_patent_app_number] => 09235670 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/235670
High withstand voltage insulated gate N-channel field effect transistor Jan 21, 1999 Issued
Array ( [id] => 4310320 [patent_doc_number] => 06252288 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'High power trench-based rectifier with improved reverse breakdown characteristic' [patent_app_type] => 1 [patent_app_number] => 9/232787 [patent_app_country] => US [patent_app_date] => 1999-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4456 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/252/06252288.pdf [firstpage_image] =>[orig_patent_app_number] => 232787 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/232787
High power trench-based rectifier with improved reverse breakdown characteristic Jan 18, 1999 Issued
Array ( [id] => 7343294 [patent_doc_number] => 20040046215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => new [patent_app_number] => 09/227935 [patent_app_country] => US [patent_app_date] => 1999-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4681 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20040046215.pdf [firstpage_image] =>[orig_patent_app_number] => 09227935 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/227935
Semiconductor device having interconnection structure Jan 10, 1999 Issued
Array ( [id] => 751872 [patent_doc_number] => 07023060 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-04 [patent_title] => 'Methods for programming read-only memory cells and associated memories' [patent_app_type] => utility [patent_app_number] => 09/224756 [patent_app_country] => US [patent_app_date] => 1999-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2468 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/023/07023060.pdf [firstpage_image] =>[orig_patent_app_number] => 09224756 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/224756
Methods for programming read-only memory cells and associated memories Jan 3, 1999 Issued
Array ( [id] => 6137857 [patent_doc_number] => 20020000612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-03 [patent_title] => 'POWER-MOS TRANSISTOR' [patent_app_type] => new [patent_app_number] => 09/212186 [patent_app_country] => US [patent_app_date] => 1998-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2877 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0000/20020000612.pdf [firstpage_image] =>[orig_patent_app_number] => 09212186 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/212186
POWER-MOS TRANSISTOR Dec 14, 1998 Abandoned
09/209654 ISOLATION BY ACTIVE TRANSISTORS WITH GROUNDED GATES Dec 9, 1998 Abandoned
Array ( [id] => 4301024 [patent_doc_number] => 06184555 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Field effect-controlled semiconductor component' [patent_app_type] => 1 [patent_app_number] => 9/117636 [patent_app_country] => US [patent_app_date] => 1998-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5145 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184555.pdf [firstpage_image] =>[orig_patent_app_number] => 117636 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/117636
Field effect-controlled semiconductor component Dec 3, 1998 Issued
Array ( [id] => 1587820 [patent_doc_number] => 06359310 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Shallow doped junctions with a variable profile gradation of dopants' [patent_app_type] => B1 [patent_app_number] => 09/196515 [patent_app_country] => US [patent_app_date] => 1998-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3840 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359310.pdf [firstpage_image] =>[orig_patent_app_number] => 09196515 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/196515
Shallow doped junctions with a variable profile gradation of dopants Nov 19, 1998 Issued
Array ( [id] => 1368820 [patent_doc_number] => 06570242 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Bipolar transistor with high breakdown voltage collector' [patent_app_type] => B1 [patent_app_number] => 09/196375 [patent_app_country] => US [patent_app_date] => 1998-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 4584 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/570/06570242.pdf [firstpage_image] =>[orig_patent_app_number] => 09196375 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/196375
Bipolar transistor with high breakdown voltage collector Nov 18, 1998 Issued
Array ( [id] => 1497000 [patent_doc_number] => 06404012 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Semiconductor device having a reverse conductive type diffusion layer in an extended drain diffusion layer' [patent_app_type] => B1 [patent_app_number] => 09/190448 [patent_app_country] => US [patent_app_date] => 1998-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 32 [patent_no_of_words] => 14463 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/404/06404012.pdf [firstpage_image] =>[orig_patent_app_number] => 09190448 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/190448
Semiconductor device having a reverse conductive type diffusion layer in an extended drain diffusion layer Nov 12, 1998 Issued
Array ( [id] => 4090786 [patent_doc_number] => 06025630 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Insulating film formed using an organic silane and method of producing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/190828 [patent_app_country] => US [patent_app_date] => 1998-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 4154 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/025/06025630.pdf [firstpage_image] =>[orig_patent_app_number] => 190828 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/190828
Insulating film formed using an organic silane and method of producing semiconductor device Nov 11, 1998 Issued
Array ( [id] => 3952869 [patent_doc_number] => 05998833 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Power semiconductor devices having improved high frequency switching and breakdown characteristics' [patent_app_type] => 1 [patent_app_number] => 9/178845 [patent_app_country] => US [patent_app_date] => 1998-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 7950 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/998/05998833.pdf [firstpage_image] =>[orig_patent_app_number] => 178845 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/178845
Power semiconductor devices having improved high frequency switching and breakdown characteristics Oct 25, 1998 Issued
09/177575 SEMICONDUCTOR DEVICE HAVING EPITAXIAL LAYER WITH DIFFERENT THICKNESS Oct 22, 1998 Abandoned
Array ( [id] => 6946980 [patent_doc_number] => 20010020719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-13 [patent_title] => 'INSULATED GATE BIPOLAR TRANSISTOR' [patent_app_type] => new [patent_app_number] => 09/175424 [patent_app_country] => US [patent_app_date] => 1998-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4184 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20010020719.pdf [firstpage_image] =>[orig_patent_app_number] => 09175424 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/175424
Insulated gate bipolar transistor Oct 19, 1998 Issued
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