| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_doc_number] => 06130447
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-10
[patent_title] => 'Integrated circuit memories and power distribution methods including at least two control lines between adjacent power lines'
[patent_app_type] => 1
[patent_app_number] => 9/061390
[patent_app_country] => US
[patent_app_date] => 1998-04-16
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[pdf_file] => patents/06/130/06130447.pdf
[firstpage_image] =>[orig_patent_app_number] => 061390
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/061390 | Integrated circuit memories and power distribution methods including at least two control lines between adjacent power lines | Apr 15, 1998 | Issued |
| 09/053492 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING A MULTI-LAYER ELECTRIC CHARGE-CAPTURING FILM | Apr 1, 1998 | Abandoned |
Array
(
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[patent_doc_number] => 06271555
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-07
[patent_title] => 'Borderless wordline for DRAM cell'
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[firstpage_image] =>[orig_patent_app_number] => 052403
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/052403 | Borderless wordline for DRAM cell | Mar 30, 1998 | Issued |
Array
(
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[patent_doc_number] => 06043534
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-28
[patent_title] => 'High voltage semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/052142
[patent_app_country] => US
[patent_app_date] => 1998-03-31
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[pdf_file] => patents/06/043/06043534.pdf
[firstpage_image] =>[orig_patent_app_number] => 052142
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/052142 | High voltage semiconductor device | Mar 30, 1998 | Issued |
Array
(
[id] => 6891255
[patent_doc_number] => 20010017417
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-08-30
[patent_title] => 'SEMICONDUCTOR DEVICE WITH A CONDDUCTIVE METAL LAYER ENGAGING NOT LESS THAN FIFTY PERCENT OF A SOURCE\\DRAIN REGION'
[patent_app_type] => new
[patent_app_number] => 09/052564
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[patent_app_date] => 1998-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 39
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[firstpage_image] =>[orig_patent_app_number] => 09052564
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/052564 | SEMICONDUCTOR DEVICE WITH A CONDDUCTIVE METAL LAYER ENGAGING NOT LESS THAN FIFTY PERCENT OF A SOURCE\DRAIN REGION | Mar 30, 1998 | Abandoned |
Array
(
[id] => 5918018
[patent_doc_number] => 20020113278
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-22
[patent_title] => 'STACKED SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => new
[patent_app_number] => 09/052065
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 09052065
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/052065 | Stacked semiconductor integrated circuit device having an inter-electrode barrier to silicide formation | Mar 30, 1998 | Issued |
Array
(
[id] => 4152094
[patent_doc_number] => 06064100
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[patent_issue_date] => 2000-05-16
[patent_title] => 'Product for ROM components having a silicon controlled rectifier structure'
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[firstpage_image] =>[orig_patent_app_number] => 049102
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/049102 | Product for ROM components having a silicon controlled rectifier structure | Mar 26, 1998 | Issued |
Array
(
[id] => 7026650
[patent_doc_number] => 20010013635
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-08-16
[patent_title] => 'BIPOLAR TRANSISTOR WITH TRENCHED-GROOVE ISOLATION REGIONS'
[patent_app_type] => new
[patent_app_number] => 09/045794
[patent_app_country] => US
[patent_app_date] => 1998-03-23
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[pdf_file] => publications/A1/0013/20010013635.pdf
[firstpage_image] =>[orig_patent_app_number] => 09045794
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/045794 | Bipolar transistor with trenched-groove isolation regions | Mar 22, 1998 | Issued |
Array
(
[id] => 6959574
[patent_doc_number] => 20010011758
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-08-09
[patent_title] => 'METHOD AND DEVICE TO INCREASE LATCH-UP IMMUNITY IN CMOS DEVICE'
[patent_app_type] => new
[patent_app_number] => 09/044356
[patent_app_country] => US
[patent_app_date] => 1998-03-19
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 09044356
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/044356 | METHOD AND DEVICE TO INCREASE LATCH-UP IMMUNITY IN CMOS DEVICE | Mar 18, 1998 | Abandoned |
Array
(
[id] => 4309783
[patent_doc_number] => 06188123
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-13
[patent_title] => 'Semiconductor element having vertical discrete bipolar transistor and semiconductor device having same'
[patent_app_type] => 1
[patent_app_number] => 9/035266
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[firstpage_image] =>[orig_patent_app_number] => 035266
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/035266 | Semiconductor element having vertical discrete bipolar transistor and semiconductor device having same | Mar 4, 1998 | Issued |
Array
(
[id] => 4184099
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-14
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 9/034316
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[firstpage_image] =>[orig_patent_app_number] => 034316
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/034316 | Semiconductor memory device | Mar 3, 1998 | Issued |
Array
(
[id] => 4244194
[patent_doc_number] => 06091128
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-18
[patent_title] => 'Semiconductor systems utilizing materials that form rectifying junctions in both N and P-type doping regions, whether metallurgically or field induced, and methods of use'
[patent_app_type] => 1
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Array
(
[id] => 4189431
[patent_doc_number] => 06150699
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-21
[patent_title] => 'Tri-voltage Bi-CMOS semiconductor device'
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[patent_app_number] => 9/033675
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[patent_app_date] => 1998-03-03
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[firstpage_image] =>[orig_patent_app_number] => 033675
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/033675 | Tri-voltage Bi-CMOS semiconductor device | Mar 2, 1998 | Issued |
| 09/032495 | INTEGRATED PHOTOVOLTAIC SWITCH WITH INTEGRATED POWER DEVICE | Feb 26, 1998 | Abandoned |
Array
(
[id] => 4136959
[patent_doc_number] => 06034400
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[patent_kind] => NA
[patent_issue_date] => 2000-03-07
[patent_title] => 'Integrated circuit with improved electrostatic discharge protection including multi-level inductor'
[patent_app_type] => 1
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[firstpage_image] =>[orig_patent_app_number] => 030149
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/030149 | Integrated circuit with improved electrostatic discharge protection including multi-level inductor | Feb 24, 1998 | Issued |
Array
(
[id] => 4009468
[patent_doc_number] => 06005272
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-21
[patent_title] => 'Trench transistor with source contact in trench'
[patent_app_type] => 1
[patent_app_number] => 9/028894
[patent_app_country] => US
[patent_app_date] => 1998-02-24
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[firstpage_image] =>[orig_patent_app_number] => 028894
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/028894 | Trench transistor with source contact in trench | Feb 23, 1998 | Issued |
| 09/026405 | METAL NITRIDE AND SILICIDE STRUCTURES AND METHODS OF FORMING SAME | Feb 18, 1998 | Abandoned |
Array
(
[id] => 4309732
[patent_doc_number] => 06188119
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[patent_kind] => NA
[patent_issue_date] => 2001-02-13
[patent_title] => 'Semiconductor device having barrier metal layer between a silicon electrode and metal electrode and manufacturing method for same'
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Array
(
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[patent_title] => 'Laser ablateable material'
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[firstpage_image] =>[orig_patent_app_number] => 894540
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/894540 | Laser ablateable material | Jan 29, 1998 | Issued |
Array
(
[id] => 4179420
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[patent_kind] => NA
[patent_issue_date] => 2000-07-04
[patent_title] => 'Semiconductor light emitting device with carrier diffusion suppressing layer'
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[patent_app_date] => 1998-01-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/014683 | Semiconductor light emitting device with carrier diffusion suppressing layer | Jan 27, 1998 | Issued |