| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_kind] => NA
[patent_issue_date] => 2000-06-20
[patent_title] => 'Semiconductor devices having backside probing capability'
[patent_app_type] => 1
[patent_app_number] => 9/010881
[patent_app_country] => US
[patent_app_date] => 1998-01-22
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[firstpage_image] =>[orig_patent_app_number] => 010881
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Array
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[patent_kind] => NA
[patent_issue_date] => 2000-12-19
[patent_title] => 'Energy-absorbing stable guard ring'
[patent_app_type] => 1
[patent_app_number] => 9/002116
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[firstpage_image] =>[orig_patent_app_number] => 002116
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/002116 | Energy-absorbing stable guard ring | Dec 30, 1997 | Issued |
Array
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[patent_doc_number] => 06121655
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-19
[patent_title] => 'Nonvolatile semiconductor memory device and method for fabricating the same and semiconductor integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 9/000848
[patent_app_country] => US
[patent_app_date] => 1997-12-30
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[firstpage_image] =>[orig_patent_app_number] => 000848
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/000848 | Nonvolatile semiconductor memory device and method for fabricating the same and semiconductor integrated circuit | Dec 29, 1997 | Issued |
Array
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[patent_doc_number] => 06359331
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-19
[patent_title] => 'High power switching module'
[patent_app_type] => B1
[patent_app_number] => 08/997220
[patent_app_country] => US
[patent_app_date] => 1997-12-23
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[firstpage_image] =>[orig_patent_app_number] => 08997220
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/997220 | High power switching module | Dec 22, 1997 | Issued |
Array
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[id] => 4292325
[patent_doc_number] => 06268623
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-31
[patent_title] => 'Apparatus and method for margin testing single polysilicon EEPROM cells'
[patent_app_type] => 1
[patent_app_number] => 8/995873
[patent_app_country] => US
[patent_app_date] => 1997-12-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/995873 | Apparatus and method for margin testing single polysilicon EEPROM cells | Dec 21, 1997 | Issued |
Array
(
[id] => 4176756
[patent_doc_number] => 06140691
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-31
[patent_title] => 'Trench isolation structure having a low K dielectric material isolated from a silicon-based substrate'
[patent_app_type] => 1
[patent_app_number] => 8/994701
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/994701 | Trench isolation structure having a low K dielectric material isolated from a silicon-based substrate | Dec 18, 1997 | Issued |
| 08/989822 | HIGH DENSITY ISOLATION USING AN IMPLANT AS A POLISH STOP | Dec 11, 1997 | Abandoned |
Array
(
[id] => 3918200
[patent_doc_number] => 06002160
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[patent_kind] => NA
[patent_issue_date] => 1999-12-14
[patent_title] => 'Semiconductor isolation process to minimize weak oxide problems'
[patent_app_type] => 1
[patent_app_number] => 8/989820
[patent_app_country] => US
[patent_app_date] => 1997-12-12
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[pdf_file] => patents/06/002/06002160.pdf
[firstpage_image] =>[orig_patent_app_number] => 989820
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/989820 | Semiconductor isolation process to minimize weak oxide problems | Dec 11, 1997 | Issued |
| 08/990141 | SYMMETRICALLY IMPLANTED PUNCH-THROUGH STOPPER FOR RUGGED DMOS POWER DEVICE STRUCTURE AND METHOD OF MAKING SAME | Dec 11, 1997 | Abandoned |
Array
(
[id] => 4244166
[patent_doc_number] => 06091126
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-18
[patent_title] => 'Electromagnetic wave detector'
[patent_app_type] => 1
[patent_app_number] => 8/984944
[patent_app_country] => US
[patent_app_date] => 1997-12-04
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[firstpage_image] =>[orig_patent_app_number] => 984944
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/984944 | Electromagnetic wave detector | Dec 3, 1997 | Issued |
Array
(
[id] => 3933023
[patent_doc_number] => 05877529
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[patent_issue_date] => 1999-03-02
[patent_title] => 'Mosfet termination design and core cell configuration to increase breakdown voltage and to improve device ruggedness'
[patent_app_type] => 1
[patent_app_number] => 8/978667
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/978667 | Mosfet termination design and core cell configuration to increase breakdown voltage and to improve device ruggedness | Nov 25, 1997 | Issued |
Array
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[id] => 4294014
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[patent_country] => US
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[patent_issue_date] => 2001-04-03
[patent_title] => 'Semiconductor memory array with buried drain lines and processing methods therefor'
[patent_app_type] => 1
[patent_app_number] => 8/976751
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 976751
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/976751 | Semiconductor memory array with buried drain lines and processing methods therefor | Nov 23, 1997 | Issued |
Array
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[patent_issue_date] => 2001-07-17
[patent_title] => 'Lateral semiconductor structure for forming a temperature-compensated voltage limitation'
[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/968003 | Lateral semiconductor structure for forming a temperature-compensated voltage limitation | Nov 11, 1997 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/964868 | Emitter-switched transistor structures | Nov 4, 1997 | Issued |
Array
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Array
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Array
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Array
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[patent_kind] => NA
[patent_issue_date] => 1998-11-03
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[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/954820 | Conductive spacer lightly doped drain (LDD) for hot carrier effect (HCE) control | Oct 20, 1997 | Issued |
Array
(
[id] => 4137551
[patent_doc_number] => 06147382
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-14
[patent_title] => 'Semiconductor switching device with segmented sources'
[patent_app_type] => 1
[patent_app_number] => 8/953050
[patent_app_country] => US
[patent_app_date] => 1997-10-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/953050 | Semiconductor switching device with segmented sources | Oct 16, 1997 | Issued |
| 08/949504 | APPARATUS AND METHOD OF FABRICATING INVERSION CHANNEL DEVICES WITH PRECISION GATE DOPING FOR A MONOLITHIC INTERGRATED CIRCUIT | Oct 13, 1997 | Abandoned |