
Nan-ying Yang
Examiner (ID: 8070, Phone: (571)272-2211 , Office: P/2697 )
| Most Active Art Unit | 2622 |
| Art Unit(s) | 2629, 2697, 2622, 2621, 2623 |
| Total Applications | 888 |
| Issued Applications | 650 |
| Pending Applications | 75 |
| Abandoned Applications | 186 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3791864
[patent_doc_number] => 05780360
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'Purge in silicide deposition processes dichlorosilane'
[patent_app_type] => 1
[patent_app_number] => 8/666976
[patent_app_country] => US
[patent_app_date] => 1996-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5829
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 42
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/780/05780360.pdf
[firstpage_image] =>[orig_patent_app_number] => 666976
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/666976 | Purge in silicide deposition processes dichlorosilane | Jun 19, 1996 | Issued |
Array
(
[id] => 3877193
[patent_doc_number] => 05804475
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-08
[patent_title] => 'Method of forming an interband lateral resonant tunneling transistor'
[patent_app_type] => 1
[patent_app_number] => 8/665931
[patent_app_country] => US
[patent_app_date] => 1996-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 3828
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/804/05804475.pdf
[firstpage_image] =>[orig_patent_app_number] => 665931
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/665931 | Method of forming an interband lateral resonant tunneling transistor | Jun 18, 1996 | Issued |
Array
(
[id] => 3694883
[patent_doc_number] => 05661085
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-26
[patent_title] => 'Method for forming a low contact leakage and low contact resistance integrated circuit device electrode'
[patent_app_type] => 1
[patent_app_number] => 8/665329
[patent_app_country] => US
[patent_app_date] => 1996-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 7941
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 304
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/661/05661085.pdf
[firstpage_image] =>[orig_patent_app_number] => 665329
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/665329 | Method for forming a low contact leakage and low contact resistance integrated circuit device electrode | Jun 16, 1996 | Issued |
Array
(
[id] => 3739071
[patent_doc_number] => 05753533
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-19
[patent_title] => 'Method for etching a tungsten film'
[patent_app_type] => 1
[patent_app_number] => 8/663599
[patent_app_country] => US
[patent_app_date] => 1996-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 2599
[patent_no_of_claims] => 1
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/753/05753533.pdf
[firstpage_image] =>[orig_patent_app_number] => 663599
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/663599 | Method for etching a tungsten film | Jun 13, 1996 | Issued |
Array
(
[id] => 3727184
[patent_doc_number] => 05670423
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-23
[patent_title] => 'Method for using disposable hard mask for gate critical dimension control'
[patent_app_type] => 1
[patent_app_number] => 8/663431
[patent_app_country] => US
[patent_app_date] => 1996-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 2206
[patent_no_of_claims] => 10
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[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/670/05670423.pdf
[firstpage_image] =>[orig_patent_app_number] => 663431
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/663431 | Method for using disposable hard mask for gate critical dimension control | Jun 12, 1996 | Issued |
Array
(
[id] => 3687587
[patent_doc_number] => 05691235
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-25
[patent_title] => 'Method of depositing tungsten nitride using a source gas comprising silicon'
[patent_app_type] => 1
[patent_app_number] => 8/667907
[patent_app_country] => US
[patent_app_date] => 1996-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 1555
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/691/05691235.pdf
[firstpage_image] =>[orig_patent_app_number] => 667907
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/667907 | Method of depositing tungsten nitride using a source gas comprising silicon | Jun 11, 1996 | Issued |
Array
(
[id] => 3620627
[patent_doc_number] => 05641710
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-24
[patent_title] => 'Post tungsten etch back anneal, to improve aluminum step coverage'
[patent_app_type] => 1
[patent_app_number] => 8/661243
[patent_app_country] => US
[patent_app_date] => 1996-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3339
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 341
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/641/05641710.pdf
[firstpage_image] =>[orig_patent_app_number] => 661243
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/661243 | Post tungsten etch back anneal, to improve aluminum step coverage | Jun 9, 1996 | Issued |
Array
(
[id] => 3791824
[patent_doc_number] => 05726096
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-10
[patent_title] => 'Method for forming a tungsten silicide layer in a semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/654003
[patent_app_country] => US
[patent_app_date] => 1996-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1347
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/726/05726096.pdf
[firstpage_image] =>[orig_patent_app_number] => 654003
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/654003 | Method for forming a tungsten silicide layer in a semiconductor device | May 27, 1996 | Issued |
Array
(
[id] => 3681441
[patent_doc_number] => 05662814
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-02
[patent_title] => 'Micro-machining minute hollow using native oxide membrane'
[patent_app_type] => 1
[patent_app_number] => 8/653977
[patent_app_country] => US
[patent_app_date] => 1996-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 31
[patent_no_of_words] => 5800
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/662/05662814.pdf
[firstpage_image] =>[orig_patent_app_number] => 653977
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/653977 | Micro-machining minute hollow using native oxide membrane | May 27, 1996 | Issued |
Array
(
[id] => 3738286
[patent_doc_number] => 05716420
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-10
[patent_title] => 'Process for making package-type fused solid electrolytic capacitor'
[patent_app_type] => 1
[patent_app_number] => 8/650844
[patent_app_country] => US
[patent_app_date] => 1996-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 21
[patent_no_of_words] => 3712
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/716/05716420.pdf
[firstpage_image] =>[orig_patent_app_number] => 650844
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/650844 | Process for making package-type fused solid electrolytic capacitor | May 19, 1996 | Issued |
Array
(
[id] => 3881825
[patent_doc_number] => 05798296
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-25
[patent_title] => 'Method of fabricating a gate having a barrier of titanium silicide'
[patent_app_type] => 1
[patent_app_number] => 8/649803
[patent_app_country] => US
[patent_app_date] => 1996-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 1734
[patent_no_of_claims] => 15
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[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/798/05798296.pdf
[firstpage_image] =>[orig_patent_app_number] => 649803
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/649803 | Method of fabricating a gate having a barrier of titanium silicide | May 16, 1996 | Issued |
Array
(
[id] => 3884687
[patent_doc_number] => 05776823
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-07
[patent_title] => 'Tasin oxygen diffusion barrier in multilayer structures'
[patent_app_type] => 1
[patent_app_number] => 8/646583
[patent_app_country] => US
[patent_app_date] => 1996-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/776/05776823.pdf
[firstpage_image] =>[orig_patent_app_number] => 646583
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/646583 | Tasin oxygen diffusion barrier in multilayer structures | May 7, 1996 | Issued |
Array
(
[id] => 3867868
[patent_doc_number] => 05837603
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-17
[patent_title] => 'Planarization method by use of particle dispersion and subsequent thermal flow'
[patent_app_type] => 1
[patent_app_number] => 8/643295
[patent_app_country] => US
[patent_app_date] => 1996-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 2430
[patent_no_of_claims] => 23
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/837/05837603.pdf
[firstpage_image] =>[orig_patent_app_number] => 643295
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/643295 | Planarization method by use of particle dispersion and subsequent thermal flow | May 7, 1996 | Issued |
| 08/646535 | SEMICONDUCTOR APPARATUS AND PRODUCTION METHOD FOR THE SAME | May 7, 1996 | Abandoned |
Array
(
[id] => 3723003
[patent_doc_number] => 05672543
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-30
[patent_title] => 'Volcano defect-free tungsten plug'
[patent_app_type] => 1
[patent_app_number] => 8/639677
[patent_app_country] => US
[patent_app_date] => 1996-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 1960
[patent_no_of_claims] => 10
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/672/05672543.pdf
[firstpage_image] =>[orig_patent_app_number] => 639677
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/639677 | Volcano defect-free tungsten plug | Apr 28, 1996 | Issued |
Array
(
[id] => 3493463
[patent_doc_number] => 05508212
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-16
[patent_title] => 'Salicide process for a MOS semiconductor device using nitrogen implant of titanium'
[patent_app_type] => 1
[patent_app_number] => 8/429729
[patent_app_country] => US
[patent_app_date] => 1996-04-27
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/508/05508212.pdf
[firstpage_image] =>[orig_patent_app_number] => 429729
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/429729 | Salicide process for a MOS semiconductor device using nitrogen implant of titanium | Apr 26, 1996 | Issued |
Array
(
[id] => 3552559
[patent_doc_number] => 05573980
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-12
[patent_title] => 'Method of forming salicided self-aligned contact for SRAM cells'
[patent_app_type] => 1
[patent_app_number] => 8/583917
[patent_app_country] => US
[patent_app_date] => 1996-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 2300
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/573/05573980.pdf
[firstpage_image] =>[orig_patent_app_number] => 583917
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/583917 | Method of forming salicided self-aligned contact for SRAM cells | Apr 21, 1996 | Issued |
Array
(
[id] => 3723015
[patent_doc_number] => 05672544
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-30
[patent_title] => 'Method for reducing silicided poly gate resistance for very small transistors'
[patent_app_type] => 1
[patent_app_number] => 8/635827
[patent_app_country] => US
[patent_app_date] => 1996-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 1733
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/672/05672544.pdf
[firstpage_image] =>[orig_patent_app_number] => 635827
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/635827 | Method for reducing silicided poly gate resistance for very small transistors | Apr 21, 1996 | Issued |
Array
(
[id] => 3860651
[patent_doc_number] => 05795796
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-18
[patent_title] => 'Method of fabricating metal line structure'
[patent_app_type] => 1
[patent_app_number] => 8/634531
[patent_app_country] => US
[patent_app_date] => 1996-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 2830
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/795/05795796.pdf
[firstpage_image] =>[orig_patent_app_number] => 634531
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/634531 | Method of fabricating metal line structure | Apr 17, 1996 | Issued |
| 08/631513 | CONTACT HOLE PLUG AND METHOD OF FORMING SAME | Apr 11, 1996 | Abandoned |