Search

Nasser Moazzami Goodarzi

Supervisory Patent Examiner (ID: 12173, Phone: (571)272-4195 , Office: P/2426 )

Most Active Art Unit
2187
Art Unit(s)
2187, 2436, 2752, 2136, 2759, 2426
Total Applications
556
Issued Applications
479
Pending Applications
21
Abandoned Applications
58

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7642394 [patent_doc_number] => 06430652 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Method and apparatus for streaming data in a data processing system' [patent_app_type] => B1 [patent_app_number] => 09/000582 [patent_app_country] => US [patent_app_date] => 1997-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4810 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/430/06430652.pdf [firstpage_image] =>[orig_patent_app_number] => 09000582 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/000582
Method and apparatus for streaming data in a data processing system Dec 29, 1997 Issued
Array ( [id] => 4280799 [patent_doc_number] => 06260114 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Computer cache memory windowing' [patent_app_type] => 1 [patent_app_number] => 9/001197 [patent_app_country] => US [patent_app_date] => 1997-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3967 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/260/06260114.pdf [firstpage_image] =>[orig_patent_app_number] => 001197 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/001197
Computer cache memory windowing Dec 29, 1997 Issued
Array ( [id] => 1506000 [patent_doc_number] => 06487647 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-26 [patent_title] => 'Adaptive memory interface timing generation' [patent_app_type] => B1 [patent_app_number] => 08/998618 [patent_app_country] => US [patent_app_date] => 1997-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5609 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/487/06487647.pdf [firstpage_image] =>[orig_patent_app_number] => 08998618 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/998618
Adaptive memory interface timing generation Dec 28, 1997 Issued
Array ( [id] => 1314457 [patent_doc_number] => 06622224 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'Internal buffered bus for a drum' [patent_app_type] => B1 [patent_app_number] => 08/999292 [patent_app_country] => US [patent_app_date] => 1997-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4597 [patent_no_of_claims] => 95 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/622/06622224.pdf [firstpage_image] =>[orig_patent_app_number] => 08999292 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/999292
Internal buffered bus for a drum Dec 28, 1997 Issued
Array ( [id] => 4160522 [patent_doc_number] => 06061767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Apparatus and method in a network interface device for storing status information contiguous with a corresponding data frame in a buffer memory' [patent_app_type] => 1 [patent_app_number] => 8/993531 [patent_app_country] => US [patent_app_date] => 1997-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4421 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/061/06061767.pdf [firstpage_image] =>[orig_patent_app_number] => 993531 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/993531
Apparatus and method in a network interface device for storing status information contiguous with a corresponding data frame in a buffer memory Dec 17, 1997 Issued
Array ( [id] => 4225728 [patent_doc_number] => 06029225 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Cache bank conflict avoidance and cache collision avoidance' [patent_app_type] => 1 [patent_app_number] => 8/991196 [patent_app_country] => US [patent_app_date] => 1997-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4339 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/029/06029225.pdf [firstpage_image] =>[orig_patent_app_number] => 991196 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/991196
Cache bank conflict avoidance and cache collision avoidance Dec 15, 1997 Issued
Array ( [id] => 4176696 [patent_doc_number] => 06157986 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Fast linear tag validation unit for use in microprocessor' [patent_app_type] => 1 [patent_app_number] => 8/991908 [patent_app_country] => US [patent_app_date] => 1997-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 6 [patent_no_of_words] => 12135 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157986.pdf [firstpage_image] =>[orig_patent_app_number] => 991908 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/991908
Fast linear tag validation unit for use in microprocessor Dec 15, 1997 Issued
Array ( [id] => 4426641 [patent_doc_number] => 06178490 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Method and device for the incremental reading of a memory' [patent_app_type] => 1 [patent_app_number] => 8/991428 [patent_app_country] => US [patent_app_date] => 1997-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2797 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/178/06178490.pdf [firstpage_image] =>[orig_patent_app_number] => 991428 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/991428
Method and device for the incremental reading of a memory Dec 15, 1997 Issued
Array ( [id] => 4371133 [patent_doc_number] => 06216206 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Trace victim cache' [patent_app_type] => 1 [patent_app_number] => 8/991173 [patent_app_country] => US [patent_app_date] => 1997-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7332 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/216/06216206.pdf [firstpage_image] =>[orig_patent_app_number] => 991173 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/991173
Trace victim cache Dec 15, 1997 Issued
Array ( [id] => 4167313 [patent_doc_number] => 06065103 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Speculative store buffer' [patent_app_type] => 1 [patent_app_number] => 8/991915 [patent_app_country] => US [patent_app_date] => 1997-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9894 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/065/06065103.pdf [firstpage_image] =>[orig_patent_app_number] => 991915 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/991915
Speculative store buffer Dec 15, 1997 Issued
Array ( [id] => 4312109 [patent_doc_number] => 06237059 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'Method for estimating statistics of properties of memory system interactions among contexts in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/979398 [patent_app_country] => US [patent_app_date] => 1997-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7535 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/237/06237059.pdf [firstpage_image] =>[orig_patent_app_number] => 979398 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/979398
Method for estimating statistics of properties of memory system interactions among contexts in a computer system Nov 25, 1997 Issued
Array ( [id] => 4138624 [patent_doc_number] => 06073207 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Microcomputer comprising flash EEPROM' [patent_app_type] => 1 [patent_app_number] => 8/979151 [patent_app_country] => US [patent_app_date] => 1997-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3052 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/073/06073207.pdf [firstpage_image] =>[orig_patent_app_number] => 979151 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/979151
Microcomputer comprising flash EEPROM Nov 25, 1997 Issued
Array ( [id] => 4092344 [patent_doc_number] => 05966731 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Protocol for communication with dynamic memory' [patent_app_type] => 1 [patent_app_number] => 8/979253 [patent_app_country] => US [patent_app_date] => 1997-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 18414 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/966/05966731.pdf [firstpage_image] =>[orig_patent_app_number] => 979253 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/979253
Protocol for communication with dynamic memory Nov 25, 1997 Issued
Array ( [id] => 4260055 [patent_doc_number] => 06092170 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Data transfer apparatus between devices' [patent_app_type] => 1 [patent_app_number] => 8/978442 [patent_app_country] => US [patent_app_date] => 1997-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5974 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 371 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/092/06092170.pdf [firstpage_image] =>[orig_patent_app_number] => 978442 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/978442
Data transfer apparatus between devices Nov 24, 1997 Issued
Array ( [id] => 1549554 [patent_doc_number] => 06374328 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Generation computer with program-in-chips (PIC)' [patent_app_type] => B1 [patent_app_number] => 08/958977 [patent_app_country] => US [patent_app_date] => 1997-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1949 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/374/06374328.pdf [firstpage_image] =>[orig_patent_app_number] => 08958977 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/958977
Generation computer with program-in-chips (PIC) Oct 27, 1997 Issued
Array ( [id] => 4260384 [patent_doc_number] => 06167498 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Circuits systems and methods for managing data requests between memory subsystems operating in response to multiple address formats' [patent_app_type] => 1 [patent_app_number] => 8/944946 [patent_app_country] => US [patent_app_date] => 1997-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4192 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/167/06167498.pdf [firstpage_image] =>[orig_patent_app_number] => 944946 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/944946
Circuits systems and methods for managing data requests between memory subsystems operating in response to multiple address formats Oct 1, 1997 Issued
Array ( [id] => 4259877 [patent_doc_number] => 06092160 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Memory management method' [patent_app_type] => 1 [patent_app_number] => 8/938533 [patent_app_country] => US [patent_app_date] => 1997-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5778 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/092/06092160.pdf [firstpage_image] =>[orig_patent_app_number] => 938533 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/938533
Memory management method Sep 25, 1997 Issued
Array ( [id] => 4273472 [patent_doc_number] => 06209059 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Method and apparatus for the on-line reconfiguration of the logical volumes of a data storage system' [patent_app_type] => 1 [patent_app_number] => 8/937467 [patent_app_country] => US [patent_app_date] => 1997-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3638 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/209/06209059.pdf [firstpage_image] =>[orig_patent_app_number] => 937467 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/937467
Method and apparatus for the on-line reconfiguration of the logical volumes of a data storage system Sep 24, 1997 Issued
Array ( [id] => 4268979 [patent_doc_number] => 06138203 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Information processing apparatus and method enabling a write-once recording medium to be utilized as a rewriteable recording medium' [patent_app_type] => 1 [patent_app_number] => 8/860614 [patent_app_country] => US [patent_app_date] => 1997-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 38 [patent_no_of_words] => 13466 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/138/06138203.pdf [firstpage_image] =>[orig_patent_app_number] => 860614 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/860614
Information processing apparatus and method enabling a write-once recording medium to be utilized as a rewriteable recording medium Sep 22, 1997 Issued
Array ( [id] => 4085296 [patent_doc_number] => 06009502 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Method and apparatus for fast and robust data collection' [patent_app_type] => 1 [patent_app_number] => 8/934583 [patent_app_country] => US [patent_app_date] => 1997-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4456 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009502.pdf [firstpage_image] =>[orig_patent_app_number] => 934583 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/934583
Method and apparatus for fast and robust data collection Sep 21, 1997 Issued
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