Natalia A. Gondarenko

Array ( [id] => 20509163 [patent_doc_number] => 12543455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Display panel [patent_app_type] => utility [patent_app_number] => 17/701435 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5749 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17701435 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18379922 [patent_doc_number] => 20230155011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => LATERAL BIPOLAR TRANSISTOR WITH EMITTER AND COLLECTOR REGIONS INCLUDING PORTIONS WITHIN IN-INSULATOR LAYER CAVITIES AND METHOD [patent_app_type] => utility [patent_app_number] => 17/695892 [patent_app_country] => US [patent_app_date] => 2022-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10064 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17695892 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18161861 [patent_doc_number] => 20230028453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => Semiconductor Arrangement and Method of Manufacture [patent_app_type] => utility [patent_app_number] => 17/693604 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17693604 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18631979 [patent_doc_number] => 20230290884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => DIODE STRUCTURE AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/694632 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7483 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17694632 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18977298 [patent_doc_number] => 20240057390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => OLED DISPLAY PANEL AND METHOD OF PRODUCING OLED DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 17/754300 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5698 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17754300 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17676788 [patent_doc_number] => 20220189955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => SEMICONDUCTOR DEVICE WITH CONTROLLABLE CHANNEL LENGTH AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/689364 [patent_app_country] => US [patent_app_date] => 2022-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7439 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17689364 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18222162 [patent_doc_number] => 20230061156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => FIN-BASED LATERAL BIPOLAR JUNCTION TRANSISTOR WITH REDUCED BASE RESISTANCE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/687741 [patent_app_country] => US [patent_app_date] => 2022-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10231 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17687741 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19008107 [patent_doc_number] => 20240072178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => DIODE AND MANUFACTURING METHOD THEREFOR, AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/262083 [patent_app_country] => US [patent_app_date] => 2022-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4771 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18262083 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17886489 [patent_doc_number] => 20220301967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/682980 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13787 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17682980 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18379763 [patent_doc_number] => 20230154852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => Forming Dielectric Film With High Resistance to Tilting [patent_app_type] => utility [patent_app_number] => 17/651990 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9998 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651990 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18125649 [patent_doc_number] => 20230011266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/651522 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4300 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651522 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18570662 [patent_doc_number] => 20230260999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => 3D SELECTIVE MATERIAL TRANSFORMATION TO INTEGRATE 2D MATERIAL ELEMENTS [patent_app_type] => utility [patent_app_number] => 17/672643 [patent_app_country] => US [patent_app_date] => 2022-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14340 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17672643 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19452879 [patent_doc_number] => 20240313009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SOLID-STATE IMAGING APPARATUS [patent_app_type] => utility [patent_app_number] => 18/575339 [patent_app_country] => US [patent_app_date] => 2022-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11714 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18575339 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20246081 [patent_doc_number] => 12426427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 17/670304 [patent_app_country] => US [patent_app_date] => 2022-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 17429 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17670304 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19079553 [patent_doc_number] => 11948933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Semiconductor devices and methods of manufacturing semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/650451 [patent_app_country] => US [patent_app_date] => 2022-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 330 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17650451 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19176321 [patent_doc_number] => 20240162295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => GATE-COMMUTED THYRISTOR CELL WITH A BASE REGION HAVING A VARYING THICKNESS [patent_app_type] => utility [patent_app_number] => 18/280049 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7942 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18280049 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18296831 [patent_doc_number] => 20230106517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => SRAM CELL STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/588509 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13447 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17588509 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20260573 [patent_doc_number] => 12432944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-30 [patent_title] => Semiconductor device structure and method for forming same [patent_app_type] => utility [patent_app_number] => 18/579269 [patent_app_country] => US [patent_app_date] => 2022-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 611 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18579269 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18735799 [patent_doc_number] => 11804541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Bipolar transistor structure with emitter/collector contact to doped semiconductor well and related methods [patent_app_type] => utility [patent_app_number] => 17/578011 [patent_app_country] => US [patent_app_date] => 2022-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5538 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17578011 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17738168 [patent_doc_number] => 20220223630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => SEMICONDUCTOR DEVICE WITH MULTIPLE ZERO DIFFERENTIAL TRANSCONDUCTANCE AND METHOD OF MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 17/575732 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5055 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17575732 [rel_patent_id] =>[rel_patent_doc_number] =>)